Hi,
Due to specifics of the POWER architecture, some forms of a vector
compare followed by a vector select are represented in RTL as a compare,
followed by a logical NOT, followed by the select. This tends to end up
generating an extra instruction. This patch adds a case to
simplify-rtx.c to remove the logical NOT by reversing the outcomes of
the select. I've added a POWER-specific test case that demonstrates
that the issue is fixed.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this ok for trunk?
Thanks,
Bill
[gcc]
2015-07-06 Bill Schmidt <wschm...@linux.vnet.ibm.com>
* simplify-rtx.c (simplify_ternary_operation): Add simplification
for (!c) != {0,...,0} ? a : b for vector modes.
[gcc/testsuite]
2015-07-06 Bill Schmidt <wschm...@linux.vnet.ibm.com>
* gcc.target/powerpc/vec-cmp-sel.c: New test.
Index: gcc/simplify-rtx.c
===================================================================
--- gcc/simplify-rtx.c (revision 225440)
+++ gcc/simplify-rtx.c (working copy)
@@ -5251,6 +5251,32 @@ simplify_ternary_operation (enum rtx_code code, ma
&& rtx_equal_p (XEXP (op0, 1), op1))))
return op2;
+ /* Convert (!c) != {0,...,0} ? a : b into
+ c != {0,...,0} ? b : a for vector modes. */
+ if (VECTOR_MODE_P (GET_MODE (op1))
+ && GET_CODE (op0) == NE
+ && GET_CODE (XEXP (op0, 0)) == NOT
+ && GET_CODE (XEXP (op0, 1)) == CONST_VECTOR)
+ {
+ rtx cv = XEXP (op0, 1);
+ int nunits = CONST_VECTOR_NUNITS (cv);
+ bool ok = true;
+ for (int i = 0; i < nunits; ++i)
+ if (CONST_VECTOR_ELT (cv, i) != const0_rtx)
+ {
+ ok = false;
+ break;
+ }
+ if (ok)
+ {
+ rtx new_op0 = gen_rtx_NE (GET_MODE (op0),
+ XEXP (XEXP (op0, 0), 0),
+ XEXP (op0, 1));
+ rtx retval = gen_rtx_IF_THEN_ELSE (mode, new_op0, op2, op1);
+ return retval;
+ }
+ }
+
if (COMPARISON_P (op0) && ! side_effects_p (op0))
{
machine_mode cmp_mode = (GET_MODE (XEXP (op0, 0)) == VOIDmode
Index: gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/vec-cmp-sel.c (working copy)
@@ -0,0 +1,20 @@
+/* { dg-do compile { target powerpc64*-*-* } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-maltivec -O2" } */
+/* { dg-final { scan-assembler "vcmpgtsd" } } */
+/* { dg-final { scan-assembler-not "xxlnor" } } */
+
+/* Test code in simplify-rtx.c that converts
+ (!c) != {0,...,0} ? a : b
+ into
+ c != {0,...,0} ? b : a */
+
+#include <altivec.h>
+
+vector signed long long foo () {
+ vector signed long long x = { 25399, -12900 };
+ vector signed long long y = { 12178, -9987 };
+ vector bool long long b = vec_cmpge (x, y);
+ vector signed long long z = vec_sel (y, x, b);
+ return z;
+}
