Hi,
I checked in the following cleanup patches.
H.J.
commit b45118372b8e816325072760d431747354bb5f46
Author: H.J. Lu <hjl.to...@gmail.com>
Date: Fri Jul 22 09:37:26 2011 -0700
Rename x32_general_operand to si_general_operand.
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index a4b34b9..5c2c673 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,3 +1,23 @@
+2011-07-22 H.J. Lu <hongjiu...@intel.com>
+
+ * config/i386/i386.md (general_operand): Replace
+ x32_general_operand with si_general_operand.
+ (general_szext_operand): Likewise.
+ (addsi_1_zext): Likewise.
+ (*addsi_2_zext): Likewise.
+ (*subsi_1_zext): Likewise.
+ (*subsi_2_zext): Likewise.
+ (*subsi_3_zext): Likewise.
+ (*addsi3_carry_zext): Likewise.
+ (*subsi3_carry_zext): Likewise.
+ (*andsi_1): Likewise.
+ (*andsi_1_zext): Likewise.
+ (*andsi_2_zext): Likewise.
+
+ * config/i386/predicates.md (x32_general_operand): Renamed to
+ ...
+ (si_general_operand): This.
+
2011-07-21 H.J. Lu <hongjiu...@intel.com>
* config/i386/i386.c (ix86_option_override_internal): Disallow
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 09ea1d4..c834bad 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -879,7 +879,7 @@
(define_mode_attr general_operand
[(QI "general_operand")
(HI "general_operand")
- (SI "x32_general_operand")
+ (SI "si_general_operand")
(DI "x86_64_general_operand")
(TI "x86_64_general_operand")])
@@ -887,7 +887,7 @@
(define_mode_attr general_szext_operand
[(QI "general_operand")
(HI "general_operand")
- (SI "x32_general_operand")
+ (SI "si_general_operand")
(DI "x86_64_szext_general_operand")])
;; Immediate operand predicate for integer modes.
@@ -5531,7 +5531,7 @@
[(set (match_operand:DI 0 "register_operand" "=r,r,r")
(zero_extend:DI
(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0,r,r")
- (match_operand:SI 2 "x32_general_operand" "rmYe,0,lYl"))))
+ (match_operand:SI 2 "si_general_operand" "rmYe,0,lYl"))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
{
@@ -5920,7 +5920,7 @@
[(set (reg FLAGS_REG)
(compare
(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
- (match_operand:SI 2 "x32_general_operand" "rmYe"))
+ (match_operand:SI 2 "si_general_operand" "rmYe"))
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI (plus:SI (match_dup 1) (match_dup 2))))]
@@ -6500,7 +6500,7 @@
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
(minus:SI (match_operand:SI 1 "register_operand" "0")
- (match_operand:SI 2 "x32_general_operand" "rmYe"))))
+ (match_operand:SI 2 "si_general_operand" "rmYe"))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)"
"sub{l}\t{%2, %k0|%k0, %2}"
@@ -6537,7 +6537,7 @@
[(set (reg FLAGS_REG)
(compare
(minus:SI (match_operand:SI 1 "register_operand" "0")
- (match_operand:SI 2 "x32_general_operand" "rmYe"))
+ (match_operand:SI 2 "si_general_operand" "rmYe"))
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
@@ -6564,7 +6564,7 @@
(define_insn "*subsi_3_zext"
[(set (reg FLAGS_REG)
(compare (match_operand:SI 1 "register_operand" "0")
- (match_operand:SI 2 "x32_general_operand" "rmYe")))
+ (match_operand:SI 2 "si_general_operand" "rmYe")))
(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
(minus:SI (match_dup 1)
@@ -6611,7 +6611,7 @@
(plus:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
(plus:SI (match_operator 3 "ix86_carry_flag_operator"
[(reg FLAGS_REG) (const_int 0)])
- (match_operand:SI 2 "x32_general_operand"
"rmYe")))))
+ (match_operand:SI 2 "si_general_operand" "rmYe")))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && ix86_binary_operator_ok (PLUS, SImode, operands)"
"adc{l}\t{%2, %k0|%k0, %2}"
@@ -6626,7 +6626,7 @@
(minus:SI (match_operand:SI 1 "register_operand" "0")
(plus:SI (match_operator 3 "ix86_carry_flag_operator"
[(reg FLAGS_REG) (const_int 0)])
- (match_operand:SI 2 "x32_general_operand"
"rmYe")))))
+ (match_operand:SI 2 "si_general_operand"
"rmYe")))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && ix86_binary_operator_ok (MINUS, SImode, operands)"
"sbb{l}\t{%2, %k0|%k0, %2}"
@@ -7749,7 +7749,7 @@
(define_insn "*andsi_1"
[(set (match_operand:SI 0 "nonimmediate_operand" "=rm,r,r")
(and:SI (match_operand:SI 1 "nonimmediate_operand" "%0,0,qm")
- (match_operand:SI 2 "x32_general_operand" "rYe,rm,L")))
+ (match_operand:SI 2 "si_general_operand" "rYe,rm,L")))
(clobber (reg:CC FLAGS_REG))]
"ix86_binary_operator_ok (AND, SImode, operands)"
{
@@ -7796,7 +7796,7 @@
[(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI
(and:SI (match_operand:SI 1 "nonimmediate_operand" "%0")
- (match_operand:SI 2 "x32_general_operand" "rmYe"))))
+ (match_operand:SI 2 "si_general_operand" "rmYe"))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && ix86_binary_operator_ok (AND, SImode, operands)"
"and{l}\t{%2, %k0|%k0, %2}"
@@ -7959,7 +7959,7 @@
[(set (reg FLAGS_REG)
(compare (and:SI
(match_operand:SI 1 "nonimmediate_operand" "%0")
- (match_operand:SI 2 "x32_general_operand" "rmYe"))
+ (match_operand:SI 2 "si_general_operand" "rmYe"))
(const_int 0)))
(set (match_operand:DI 0 "register_operand" "=r")
(zero_extend:DI (and:SI (match_dup 1) (match_dup 2))))]
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 8b87753..56ce0a6 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -1206,8 +1206,8 @@
return !TARGET_X32 || !pic_32bit_operand (op, mode);
})
-;; Return nonzero if OP is general operand representable on x32.
-(define_predicate "x32_general_operand"
+;; Test for a valid general operand for SImode.
+(define_predicate "si_general_operand"
(if_then_else (and (match_test "TARGET_X32")
(match_test "flag_pic"))
(match_operand 0 "x86_64_general_operand")
commit 66f086369b2afb58fde7eefd8fef01fe7a9442a6
Author: H.J. Lu <hjl.to...@gmail.com>
Date: Fri Jul 22 09:40:10 2011 -0700
Remove pointer_register_operand.
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index 5c2c673..ab8f9c5 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,5 +1,9 @@
2011-07-22 H.J. Lu <hongjiu...@intel.com>
+ * config/i386/predicates.md (pointer_register_operand): Removed.
+
+2011-07-22 H.J. Lu <hongjiu...@intel.com>
+
* config/i386/i386.md (general_operand): Replace
x32_general_operand with si_general_operand.
(general_szext_operand): Likewise.
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 56ce0a6..42dd599 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -1226,8 +1226,3 @@
{
return !TARGET_X32 || !SYMBOLIC_CONST (op);
})
-
-;; Test for pointer register operand
-(define_predicate "pointer_register_operand"
- (and (match_code "reg")
- (match_test "REG_POINTER (op)")))
commit 9c1bdcbb84e5da6fbfc30accde0fba38d2ec0ef6
Author: H.J. Lu <hjl.to...@gmail.com>
Date: Fri Jul 22 10:54:57 2011 -0700
Replace x32_lea_nonmemory_operand with si_lea_nonmemory_operand.
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index ab8f9c5..e5fb2a4 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,5 +1,15 @@
2011-07-22 H.J. Lu <hongjiu...@intel.com>
+ * config/i386/i386.md (LEA split): Replace
+ x32_lea_nonmemory_operand with si_lea_nonmemory_operand.
+ (*lea_general_2): Likewise.
+ (*lea_general_2_zext): Likewise.
+
+ * config/i386/predicates.md (x32_lea_nonmemory_operand): Removed.
+ (si_lea_nonmemory_operand): New.
+
+2011-07-22 H.J. Lu <hongjiu...@intel.com>
+
* config/i386/predicates.md (pointer_register_operand): Removed.
2011-07-22 H.J. Lu <hongjiu...@intel.com>
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index c834bad..b03fd88 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -5863,7 +5863,7 @@
[(set (match_operand:DI 0 "register_operand" "")
(zero_extend:DI
(plus:SI (match_operand:SI 1 "register_operand" "")
- (match_operand:SI 2 "x32_lea_nonmemory_operand" ""))))
+ (match_operand:SI 2 "si_lea_nonmemory_operand" ""))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT && reload_completed
&& ix86_lea_for_add_ok (insn, operands)"
@@ -6312,7 +6312,7 @@
[(set (match_operand 0 "register_operand" "=r")
(plus (mult (match_operand 1 "index_register_operand" "l")
(match_operand 2 "const248_operand" "i"))
- (match_operand 3 "x32_lea_nonmemory_operand" "rYe")))]
+ (match_operand 3 "si_lea_nonmemory_operand" "rYe")))]
"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
|| (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
&& (!TARGET_PARTIAL_REG_STALL
@@ -6345,7 +6345,7 @@
(plus:SI (mult:SI
(match_operand:SI 1 "index_register_operand" "l")
(match_operand:SI 2 "const248_operand" "n"))
- (match_operand:SI 3 "x32_lea_nonmemory_operand" "rYe"))))]
+ (match_operand:SI 3 "si_lea_nonmemory_operand" "rYe"))))]
"TARGET_64BIT"
"#"
"&& reload_completed"
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 42dd599..51c5e0b 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -1220,9 +1220,9 @@
return !TARGET_X32 || !SYMBOLIC_CONST (op);
})
-;; Return nonzero if OP is nonmemory operand representable in lea on x32.
-(define_predicate "x32_lea_nonmemory_operand"
- (match_operand 0 "nonmemory_operand")
-{
- return !TARGET_X32 || !SYMBOLIC_CONST (op);
-})
+;; Test for a valid nonmemory operand for lea in SImode.
+(define_predicate "si_lea_nonmemory_operand"
+ (and (match_operand 0 "nonmemory_operand")
+ (ior (match_test "!TARGET_X32")
+ (match_test "GET_MODE (op) != SImode")
+ (match_test "!SYMBOLIC_CONST (op)"))))
commit 09fae22ac46320ac4bc120982105258372d9f276
Author: H.J. Lu <hjl.to...@gmail.com>
Date: Fri Jul 22 11:11:01 2011 -0700
Replace x32_lea_immediate_operand with si_lea_immediate_operand.
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index e5fb2a4..3dc46e2 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,5 +1,17 @@
2011-07-22 H.J. Lu <hongjiu...@intel.com>
+ * config/i386/constraints.md (Yl): Replace
+ x32_lea_immediate_operand with si_lea_immediate_operand.
+ * config/i386/i386.md (*lea_general_1): Likewise.
+ (*lea_general_1_zext): Likewise.
+ (*lea_general_3): Likewise.
+ (*lea_general_3_zext): Likewise.
+
+ * config/i386/predicates.md (x32_lea_immediate_operand): Removed.
+ (si_lea_immediate_operand): New.
+
+2011-07-22 H.J. Lu <hongjiu...@intel.com>
+
* config/i386/i386.md (LEA split): Replace
x32_lea_nonmemory_operand with si_lea_nonmemory_operand.
(*lea_general_2): Likewise.
diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
index 0b53c76..53806c6 100644
--- a/gcc/config/i386/constraints.md
+++ b/gcc/config/i386/constraints.md
@@ -143,7 +143,7 @@
(define_constraint "Yl"
"Immediate constant for lea."
(if_then_else (match_test "TARGET_X32")
- (match_operand 0 "x32_lea_immediate_operand")
+ (match_operand 0 "si_lea_immediate_operand")
(match_operand 0 "immediate_operand")))
(define_constraint "z"
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index b03fd88..2cf5c93 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -6259,7 +6259,7 @@
[(set (match_operand 0 "register_operand" "=r")
(plus (plus (match_operand 1 "index_register_operand" "l")
(match_operand 2 "register_operand" "r"))
- (match_operand 3 "x32_lea_immediate_operand" "Ye")))]
+ (match_operand 3 "si_lea_immediate_operand" "Ye")))]
"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
|| (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
&& (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
@@ -6292,7 +6292,7 @@
(plus:SI (plus:SI
(match_operand:SI 1 "index_register_operand" "l")
(match_operand:SI 2 "register_operand" "r"))
- (match_operand:SI 3 "x32_lea_immediate_operand" "Ye"))))]
+ (match_operand:SI 3 "si_lea_immediate_operand" "Ye"))))]
"TARGET_64BIT"
"#"
"&& reload_completed"
@@ -6365,7 +6365,7 @@
(plus (plus (mult (match_operand 1 "index_register_operand" "l")
(match_operand 2 "const248_operand" "i"))
(match_operand 3 "register_operand" "r"))
- (match_operand 4 "x32_lea_immediate_operand" "Ye")))]
+ (match_operand 4 "si_lea_immediate_operand" "Ye")))]
"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode
|| (TARGET_64BIT && GET_MODE (operands[0]) == SImode))
&& (!TARGET_PARTIAL_REG_STALL
@@ -6403,7 +6403,7 @@
(match_operand:SI 1 "index_register_operand" "l")
(match_operand:SI 2 "const248_operand" "n"))
(match_operand:SI 3 "register_operand" "r"))
- (match_operand:SI 4 "x32_lea_immediate_operand" "Ye"))))]
+ (match_operand:SI 4 "si_lea_immediate_operand" "Ye"))))]
"TARGET_64BIT"
"#"
"&& reload_completed"
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 51c5e0b..e1e5b6a 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -1213,12 +1213,12 @@
(match_operand 0 "x86_64_general_operand")
(match_operand 0 "general_operand")))
-;; Return true when a constant operand can be used in lea on x32.
-(define_predicate "x32_lea_immediate_operand"
- (match_operand 0 "immediate_operand")
-{
- return !TARGET_X32 || !SYMBOLIC_CONST (op);
-})
+;; Test for a valid immediate operand for lea in SImode.
+(define_predicate "si_lea_immediate_operand"
+ (and (match_operand 0 "immediate_operand")
+ (ior (match_test "!TARGET_X32")
+ (match_test "GET_MODE (op) != SImode")
+ (match_test "!SYMBOLIC_CONST (op)"))))
;; Test for a valid nonmemory operand for lea in SImode.
(define_predicate "si_lea_nonmemory_operand"
commit 79c4d30aaca91c0602ce760654647f7379b8b668
Author: H.J. Lu <hjl.to...@gmail.com>
Date: Fri Jul 22 11:34:01 2011 -0700
Remove x32_store_immediate_operand.
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index 3dc46e2..f8f99ff 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,5 +1,13 @@
2011-07-22 H.J. Lu <hongjiu...@intel.com>
+ * config/i386/constraints.md (Ys): Rewritten.
+ (Ye): Updated.
+ (Yl): Likewise.
+
+ * config/i386/predicates.md (x32_store_immediate_operand): Removed.
+
+2011-07-22 H.J. Lu <hongjiu...@intel.com>
+
* config/i386/constraints.md (Yl): Replace
x32_lea_immediate_operand with si_lea_immediate_operand.
* config/i386/i386.md (*lea_general_1): Likewise.
diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md
index 53806c6..a5d54a1 100644
--- a/gcc/config/i386/constraints.md
+++ b/gcc/config/i386/constraints.md
@@ -125,23 +125,25 @@
;; Constant constraints.
;; We also use the Y prefix to denote constant constraints:
-;; s Immediate constant for x32 store
-;; e Immediate constant for x32
-;; l Immediate constant for lea
+;; s Immediate constant source operand for store
+;; e Immediate constant for SImode
+;; l Immediate constant for lea
(define_constraint "Ys"
- "Immediate constant for x32 store."
- (match_operand 0 "x32_store_immediate_operand"))
+ "@internal Immediate constant source operand for store."
+ (and (match_operand 0 "immediate_operand")
+ (ior (match_test "!TARGET_X32")
+ (not (match_operand 0 "pic_32bit_operand")))))
(define_constraint "Ye"
- "Immediate constant for x32."
+ "@internal Immediate constant for SImode."
(if_then_else (and (match_test "TARGET_X32")
(match_test "flag_pic"))
(match_operand 0 "x86_64_immediate_operand")
(match_operand 0 "immediate_operand")))
(define_constraint "Yl"
- "Immediate constant for lea."
+ "@internal Immediate constant for lea."
(if_then_else (match_test "TARGET_X32")
(match_operand 0 "si_lea_immediate_operand")
(match_operand 0 "immediate_operand")))
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index e1e5b6a..267136a 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -1199,13 +1199,6 @@
return true;
})
-;; Return true when a constant operand can be stored into memory for x32.
-(define_predicate "x32_store_immediate_operand"
- (match_operand 0 "immediate_operand")
-{
- return !TARGET_X32 || !pic_32bit_operand (op, mode);
-})
-
;; Test for a valid general operand for SImode.
(define_predicate "si_general_operand"
(if_then_else (and (match_test "TARGET_X32")
commit 04f07e5710ee4ee16efb056230522b3d71da1956
Author: H.J. Lu <hjl.to...@gmail.com>
Date: Fri Jul 22 11:36:46 2011 -0700
Put back a blank line in config/i386/i386.md.
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index f8f99ff..f2afa84 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,5 +1,9 @@
2011-07-22 H.J. Lu <hongjiu...@intel.com>
+ * config/i386/i386.md: Put back a blank line.
+
+2011-07-22 H.J. Lu <hongjiu...@intel.com>
+
* config/i386/constraints.md (Ys): Rewritten.
(Ye): Updated.
(Yl): Likewise.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 2cf5c93..02b6fd6 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -977,6 +977,7 @@
(include "geode.md")
(include "atom.md")
(include "core2.md")
+
;; Operand and operator predicates and constraints
commit 2f83a7a2b6b454f5bd805aa80f37303d1cc5cddb
Author: H.J. Lu <hjl.to...@gmail.com>
Date: Fri Jul 22 13:55:03 2011 -0700
Don't check SUBREG_REG in aligned_operand.
diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index f2afa84..c2a33da 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,5 +1,10 @@
2011-07-22 H.J. Lu <hongjiu...@intel.com>
+ * config/i386/predicates.md (aligned_operand): Don't check
+ SUBREG_REG for parts.index and parts.base.
+
+2011-07-22 H.J. Lu <hongjiu...@intel.com>
+
* config/i386/i386.md: Put back a blank line.
2011-07-22 H.J. Lu <hongjiu...@intel.com>
diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index 267136a..cda74b7 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -857,15 +857,11 @@
/* Look for some component that isn't known to be aligned. */
if (parts.index)
{
- if (GET_CODE (parts.index) == SUBREG)
- parts.index = SUBREG_REG (parts.index);
if (REGNO_POINTER_ALIGN (REGNO (parts.index)) * parts.scale < 32)
return false;
}
if (parts.base)
{
- if (GET_CODE (parts.base) == SUBREG)
- parts.base = SUBREG_REG (parts.base);
if (REGNO_POINTER_ALIGN (REGNO (parts.base)) < 32)
return false;
}
