Bootstrapped & regression-tested on x86_64-linux-gnu and aarch64-linux-gnu.
Also tested via config-list.mk. Committed as preapproved.
Thanks,
Richard
gcc/
* target-insns.def (prefetch): New targetm instruction pattern.
* tree-ssa-loop-prefetch.c: Include targeth.
(tree_ssa_prefetch_arrays): Use prefetch targetm pattern instead
of HAVE_*/gen_* interface.
* builtins.c (expand_builtin_prefetch): Likewise.
* toplev.c (process_options): Likewise.
Index: gcc/target-insns.def
===================================================================
--- gcc/target-insns.def 2015-07-05 08:49:32.128750538 +0100
+++ gcc/target-insns.def 2015-07-05 08:49:32.120750686 +0100
@@ -44,6 +44,7 @@ DEF_TARGET_INSN (mem_thread_fence, (rtx
DEF_TARGET_INSN (memory_barrier, (void))
DEF_TARGET_INSN (nonlocal_goto, (rtx x0, rtx x1, rtx x2, rtx x3))
DEF_TARGET_INSN (nonlocal_goto_receiver, (void))
+DEF_TARGET_INSN (prefetch, (rtx x0, rtx x1, rtx x2))
DEF_TARGET_INSN (prologue, (void))
DEF_TARGET_INSN (return, (void))
DEF_TARGET_INSN (sibcall_epilogue, (void))
Index: gcc/tree-ssa-loop-prefetch.c
===================================================================
--- gcc/tree-ssa-loop-prefetch.c 2015-07-05 08:49:32.128750538 +0100
+++ gcc/tree-ssa-loop-prefetch.c 2015-07-05 08:49:32.124750587 +0100
@@ -57,6 +57,7 @@ Free Software Foundation; either version
#include "langhooks.h"
#include "tree-inline.h"
#include "tree-data-ref.h"
+#include "target.h"
/* FIXME: Needed for optabs, but this should all be moved to a TBD interface
@@ -216,10 +217,6 @@ #define HAVE_BACKWARD_PREFETCH 0
#define ACCEPTABLE_MISS_RATE 50
#endif
-#ifndef HAVE_prefetch
-#define HAVE_prefetch 0
-#endif
-
#define L1_CACHE_SIZE_BYTES ((unsigned) (L1_CACHE_SIZE * 1024))
#define L2_CACHE_SIZE_BYTES ((unsigned) (L2_CACHE_SIZE * 1024))
@@ -1954,11 +1951,11 @@ tree_ssa_prefetch_arrays (void)
bool unrolled = false;
int todo_flags = 0;
- if (!HAVE_prefetch
+ if (!targetm.have_prefetch ()
/* It is possible to ask compiler for say -mtune=i486 -march=pentium4.
-mtune=i486 causes us having PREFETCH_BLOCK 0, since this is part
of processor costs and i486 does not have prefetch, but
- -march=pentium4 causes HAVE_prefetch to be true. Ugh. */
+ -march=pentium4 causes targetm.have_prefetch to be true. Ugh. */
|| PREFETCH_BLOCK == 0)
return 0;
Index: gcc/builtins.c
===================================================================
--- gcc/builtins.c 2015-07-05 08:49:32.128750538 +0100
+++ gcc/builtins.c 2015-07-05 08:49:32.120750686 +0100
@@ -1282,18 +1282,16 @@ expand_builtin_prefetch (tree exp)
op2 = const0_rtx;
}
-#ifdef HAVE_prefetch
- if (HAVE_prefetch)
+ if (targetm.have_prefetch ())
{
struct expand_operand ops[3];
create_address_operand (&ops[0], op0);
create_integer_operand (&ops[1], INTVAL (op1));
create_integer_operand (&ops[2], INTVAL (op2));
- if (maybe_expand_insn (CODE_FOR_prefetch, 3, ops))
+ if (maybe_expand_insn (targetm.code_for_prefetch, 3, ops))
return;
}
-#endif
/* Don't do anything with direct references to volatile memory, but
generate code to handle other side effects. */
Index: gcc/toplev.c
===================================================================
--- gcc/toplev.c 2015-07-05 08:49:32.128750538 +0100
+++ gcc/toplev.c 2015-07-05 08:49:32.124750587 +0100
@@ -1571,19 +1571,16 @@ process_options (void)
}
}
-#ifndef HAVE_prefetch
- if (flag_prefetch_loop_arrays > 0)
+ if (flag_prefetch_loop_arrays > 0 && !targetm.code_for_prefetch)
{
warning (0, "-fprefetch-loop-arrays not supported for this target");
flag_prefetch_loop_arrays = 0;
}
-#else
- if (flag_prefetch_loop_arrays > 0 && !HAVE_prefetch)
+ else if (flag_prefetch_loop_arrays > 0 && !targetm.have_prefetch ())
{
warning (0, "-fprefetch-loop-arrays not supported for this target (try
-march switches)");
flag_prefetch_loop_arrays = 0;
}
-#endif
/* This combination of options isn't handled for i386 targets and doesn't
make much sense anyway, so don't allow it. */
