This new test tests that all shifts of int compile to exactly one
machine instruction, not two as in the PR (which was a problem in
combine). Tested on powerpc64-linux, with the usual options
(-m32,-m32/-mpowerpc64,-m64,-m64/-mlra); okay for trunk?
Segher
2015-07-03 Segher Boessenkool <seg...@kernel.crashing.org>
gcc/testsuite/
PR rtl-optimization/66706
* gcc.target/powerpc/shift-int.c: New testcase.
---
gcc/testsuite/gcc.target/powerpc/shift-int.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
create mode 100644 gcc/testsuite/gcc.target/powerpc/shift-int.c
diff --git a/gcc/testsuite/gcc.target/powerpc/shift-int.c
b/gcc/testsuite/gcc.target/powerpc/shift-int.c
new file mode 100644
index 0000000..fe696ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/shift-int.c
@@ -0,0 +1,23 @@
+/* Check that shifts do not get unnecessary extends.
+ See PR66706 for a case where this failed. */
+
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* Each function should compile to exactly two instructions. */
+/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 16 } } */
+/* { dg-final { scan-assembler-times {(?n)^\s+blr} 8 } } */
+
+
+typedef unsigned u;
+typedef signed s;
+
+u rot(u x, u n) { return (x << n) | (x >> (32 - n)); }
+u shl(u x, u n) { return x << n; }
+u shr(u x, u n) { return x >> n; }
+s asr(s x, u n) { return x >> n; }
+
+u roti(u x) { return (x << 23) | (x >> 9); }
+u shli(u x) { return x << 23; }
+u shri(u x) { return x >> 23; }
+s asri(s x) { return x >> 23; }
--
1.8.1.4
