ARMv8.1 is a set of optional architectural extensions to ARMv8. Support, added
by other patches, is enabled in binutils for ARMv8.1 and for the individual
extensions by using architechure name "armv8.1-a" or by adding the extension
name to "armv8-a".
This patch adds support to gcc for using "armv8.1-a" as an architecture name and
for using "armv8-a" with one or more of the ARMv8.1 extension names "lse",
"pan", "rdma" or "lor" . The new options are passed through to the toolchain and
don't affect code generation in gcc.
Tested aarch64-none-linux-gnu with check-gcc.
Ok for trunk?
Matthew
gcc/
2015-06-4 Matthew Wahab <matthew.wa...@arm.com>
* config/aarch64/aarch64-arches.def: Add "armv8.1-a".
* config/aarch64/aarch64-options-extensions.def: Update "fP",
"simd" and "crypto". Add "lse", "pan", "lor" and "rdma".
* gcc/config/aarch64/aarch64.h (AARCH64_FL_LSE): New.
(AARCH64_FL_PAN): New.
(AARCH64_FL_LOR): New.
(AARCH64_FL_RDMA): New.
(AARCH64_FL_FOR_ARCH8_1): New.
* doc/invoke.texi (AArch64 Options): Add "armv8.1-a" to
-march. Add "lse", "pan", "lor", "rdma" to feature modifiers.
diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def
index bf4e185..abbfce6 100644
--- a/gcc/config/aarch64/aarch64-arches.def
+++ b/gcc/config/aarch64/aarch64-arches.def
@@ -27,3 +27,4 @@
the flags implied by the architecture. */
AARCH64_ARCH("armv8-a", generic, 8, AARCH64_FL_FOR_ARCH8)
+AARCH64_ARCH("armv8.1-a", generic, 8, AARCH64_FL_FOR_ARCH8_1)
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
index f296296..1762cc8 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -39,7 +39,11 @@
AArch64, and therefore serves as a template for adding more CPUs in the
future. */
-AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, AARCH64_FL_FPSIMD | AARCH64_FL_CRYPTO, "fp")
-AARCH64_OPT_EXTENSION("simd", AARCH64_FL_FPSIMD, AARCH64_FL_SIMD | AARCH64_FL_CRYPTO, "asimd")
-AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO | AARCH64_FL_FPSIMD, AARCH64_FL_CRYPTO, "aes pmull sha1 sha2")
+AARCH64_OPT_EXTENSION("fp", AARCH64_FL_FP, AARCH64_FL_FPSIMD | AARCH64_FL_CRYPTO | AARCH64_FL_RDMA, "fp")
+AARCH64_OPT_EXTENSION("simd", AARCH64_FL_FPSIMD, AARCH64_FL_SIMD | AARCH64_FL_CRYPTO | AARCH64_FL_RDMA, "asimd")
+AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO | AARCH64_FL_FPSIMD, AARCH64_FL_CRYPTO, "aes pmull sha1 sha2")
AARCH64_OPT_EXTENSION("crc", AARCH64_FL_CRC, AARCH64_FL_CRC, "crc32")
+AARCH64_OPT_EXTENSION("lse", AARCH64_FL_LSE, AARCH64_FL_LSE, "lse")
+AARCH64_OPT_EXTENSION("pan", AARCH64_FL_PAN, AARCH64_FL_PAN, "pan")
+AARCH64_OPT_EXTENSION("lor", AARCH64_FL_LOR, AARCH64_FL_LOR, "lor")
+AARCH64_OPT_EXTENSION("rdma", AARCH64_FL_RDMA | AARCH64_FL_FPSIMD, AARCH64_FL_RDMA, "rdma")
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index 25b9927..a22c6e4 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -201,6 +201,11 @@ extern unsigned aarch64_architecture_version;
#define AARCH64_FL_CRC (1 << 3) /* Has CRC. */
/* Has static dispatch of FMA. */
#define AARCH64_FL_USE_FMA_STEERING_PASS (1 << 4)
+/* ARMv8.1 architecture extensions. */
+#define AARCH64_FL_LSE (1 << 5) /* Has Large System Extensions. */
+#define AARCH64_FL_PAN (1 << 6) /* Has Privileged Access Never. */
+#define AARCH64_FL_LOR (1 << 7) /* Has Limited Ordering regions. */
+#define AARCH64_FL_RDMA (1 << 8) /* Has ARMv8.1 Adv.SIMD. */
/* Has FP and SIMD. */
#define AARCH64_FL_FPSIMD (AARCH64_FL_FP | AARCH64_FL_SIMD)
@@ -210,6 +215,9 @@ extern unsigned aarch64_architecture_version;
/* Architecture flags that effect instruction selection. */
#define AARCH64_FL_FOR_ARCH8 (AARCH64_FL_FPSIMD)
+#define AARCH64_FL_FOR_ARCH8_1 \
+ (AARCH64_FL_FOR_ARCH8 | AARCH64_FL_LSE | AARCH64_FL_PAN \
+ | AARCH64_FL_LOR | AARCH64_FL_RDMA)
/* Macros to test ISA flags. */
extern unsigned long aarch64_isa_flags;
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index e25bd62..96033db 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12427,7 +12427,7 @@ corresponding flag to the linker.
Specify the name of the target architecture, optionally suffixed by one or
more feature modifiers. This option has the form
@option{-march=@var{arch}@r{@{}+@r{[}no@r{]}@var{feature}@r{@}*}}, where the
-only permissible value for @var{arch} is @samp{armv8-a}.
+permissible values for @var{arch} are @samp{armv8-a} or @samp{armv8.1-a}.
The permissible values for @var{feature} are documented in the sub-section
below. Additionally on native AArch64 GNU/Linux systems the value
@samp{native} is available. This option causes the compiler to pick the
@@ -12512,6 +12512,14 @@ Enable floating-point instructions.
Enable Advanced SIMD instructions. This implies floating-point instructions
are enabled. This is the default for all current possible values for options
@option{-march} and @option{-mcpu=}.
+@item lse
+Enable Large System Extension instructions.
+@item pan
+Enable Privileged Access Never support.
+@item lor
+Enable Limited Ordering Regions support.
+@item rdma
+Enable ARMv8.1 Advanced SIMD instructions.
@end table
@node Adapteva Epiphany Options
