Jan-Benedict Glaw <jbg...@lug-owl.de> writes:
> On Fri, 2015-05-22 16:42:44 +0100, Richard Sandiford
> <richard.sandif...@arm.com> wrote:
>> This patch adjusts the fix for PR target/65689 along the lines suggested
>> in https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01559.html. The idea
>> is to reuse the existing gensupport.c routine to work out the codes
>> accepted by constraints.
>>
>> I'd originally done this with an eye to using compute_test_codes for
>> the problem that Andreas found on s390. I don't think it's going to
>> be useful for that after all, but it seems worth having for its on sake.
>>
>> Bootstrapped & regression-tested on x86_64-linux-gnu. OK to install?
>
> I'm also getting fallout for arc-elf, see eg. build
> http://toolchain.lug-owl.de/buildbot/show_build_details.php?id=442948
Sorry, think this message must have been caught by a filter so it didn't
reach my inbox.
Tested on mmix and arc-elf and applied as obvious.
Thanks,
Richard
gcc/
* config/arc/constraints.md: Use lower-case names in match_code.
* config/mmix/constraints.md: Likewise.
Index: gcc/config/arc/constraints.md
===================================================================
--- gcc/config/arc/constraints.md 2015-06-01 21:07:51.418630361 +0100
+++ gcc/config/arc/constraints.md 2015-06-01 21:07:51.571631855 +0100
@@ -335,7 +335,7 @@ (define_constraint "Rcq"
Cryptic q - for short insn generation while not affecting register
allocation
Registers usable in ARCompact 16-bit instructions: @code{r0}-@code{r3},
@code{r12}-@code{r15}"
- (and (match_code "REG")
+ (and (match_code "reg")
(match_test "TARGET_Rcq
&& !arc_ccfsm_cond_exec_p ()
&& IN_RANGE (REGNO (op) ^ 4, 4, 11)")))
@@ -347,7 +347,7 @@ (define_constraint "Rcq"
(define_constraint "Rcw"
"@internal
Cryptic w - for use in early alternatives with matching constraint"
- (and (match_code "REG")
+ (and (match_code "reg")
(match_test
"TARGET_Rcw
&& REGNO (op) < FIRST_PSEUDO_REGISTER
@@ -357,7 +357,7 @@ (define_constraint "Rcw"
(define_constraint "Rcr"
"@internal
Cryptic r - for use in early alternatives with matching constraint"
- (and (match_code "REG")
+ (and (match_code "reg")
(match_test
"TARGET_Rcw
&& REGNO (op) < FIRST_PSEUDO_REGISTER
@@ -367,13 +367,13 @@ (define_constraint "Rcr"
(define_constraint "Rcb"
"@internal
Stack Pointer register @code{r28} - do not reload into its class"
- (and (match_code "REG")
+ (and (match_code "reg")
(match_test "REGNO (op) == 28")))
(define_constraint "Rck"
"@internal
blink (usful for push_s / pop_s)"
- (and (match_code "REG")
+ (and (match_code "reg")
(match_test "REGNO (op) == 31")))
(define_constraint "Rs5"
@@ -381,7 +381,7 @@ (define_constraint "Rs5"
sibcall register - only allow one of the five available 16 bit isnsn.
Registers usable in ARCompact 16-bit instructions: @code{r0}-@code{r3},
@code{r12}"
- (and (match_code "REG")
+ (and (match_code "reg")
(match_test "!arc_ccfsm_cond_exec_p ()")
(ior (match_test "(unsigned) REGNO (op) <= 3")
(match_test "REGNO (op) == 12"))))
@@ -389,7 +389,7 @@ (define_constraint "Rs5"
(define_constraint "Rcc"
"@internal
Condition Codes"
- (and (match_code "REG") (match_test "cc_register (op, VOIDmode)")))
+ (and (match_code "reg") (match_test "cc_register (op, VOIDmode)")))
(define_constraint "Q"
Index: gcc/config/mmix/constraints.md
===================================================================
--- gcc/config/mmix/constraints.md 2015-06-01 21:07:51.418630361 +0100
+++ gcc/config/mmix/constraints.md 2015-06-01 21:07:51.572631864 +0100
@@ -89,8 +89,8 @@ (define_constraint "R"
(and (not (match_code "const_int,const_double"))
(match_test "mmix_constant_address_p (op)")
(ior (match_test "!TARGET_BASE_ADDRESSES")
- (match_code "LABEL_REF")
- (and (match_code "SYMBOL_REF")
+ (match_code "label_ref")
+ (and (match_code "symbol_ref")
(match_test "SYMBOL_REF_FLAG (op)")))))
;; FIXME: L (or S) is redundant.
