On 05/08/2015 09:43 AM, Uros Bizjak wrote:
> @@ -1509,8 +1509,7 @@
> (and:DI (ashift:DI (match_operand:DI 1 "register_operand" "r")
> (match_operand:DI 2 "mul8_operand" "I"))
> (match_operand:DI 3 "immediate_operand" "i")))]
> - "HOST_BITS_PER_WIDE_INT == 64
> - && CONST_INT_P (operands[3])
> + "CONST_INT_P (operands[3])
Just noticed that we can eliminate this test if we use const_int_operand
instead.
> + "operands[2] = force_reg (DImode, GEN_INT (HOST_WIDE_INT_1 << 63));")
I bet we're now supposed to use HOST_WIDE_INT_1U, to avoid any ubsan shift
silliness.
> @@ -1929,7 +1925,7 @@ alpha_emit_set_const_1 (rtx target, machine_mode m
> temp = alpha_emit_set_const (subtarget, mode, new_const, i,
> no_output);
> if (!temp)
> {
> - new_const = (c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1);
> + new_const = (c << bits) | ((HOST_WIDE_INT_1 << bits) - 1);
Likewise.
r~
