On 10 Mar 16:17, Jakub Jelinek wrote:
> On Tue, Mar 10, 2015 at 05:54:46PM +0300, Ilya Enkovich wrote:
> > This patches set addresses the problem of inefficient usage of x86
> > addressing modes in PIC. Looking into generated 32bit PIC assembler we may
> > see lots of 'leal <symbol>@GOTOFF, %reg' instructions. Almost in all
> > cases this constant value may be propagated into following address operand,
> > but it doesn't happen for various reasons.
> >
> > I scanned assembler generated for SPEC2000 on O2 and Ofast + LTO to measure
> > patches effect. Here are results for the whole patches set:
> >
> > Test O2 ref patched Ofast + LTO ref patched
> > 164.gzip 12 0 (-100%) 39 0 (-100%)
> > 175.vpr 0 0 (-0%) 4 0 (-100%)
> > 176.gcc 141 6 (-96%) 294 10 (-97%)
> > 181.mcf 4 0 (-100%) 4 2 (-50%)
> ...
> The 0s and -100% look very suspicious to me.
That is what I want to achieve. There are no much cases when such lea
instruction may be really useful.
>
> > 2015-03-10 Ilya Enkovich <ilya.enkov...@intel.com>
> >
> > PR target/65103
> > * gcc/config/i386/i386.c (ix86_address_cost): Fix cost of a PIC
> > register.
>
> Avoid the gcc/ prefix in the ChangeLog entry.
>
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/i386/pr65103-1.c
> > @@ -0,0 +1,18 @@
> > +/* { dg-do compile { target ia32 } } */
> > +/* { dg-options "-m32 -O2 -fPIE" } */
>
> No -m32 in dg-options please. As the test is guarded with
> ia32, there is no need for that either.
> But -fPIE needs to be guarded too by effective target pie.
Thank you for comments! Will fix it for all patches. Here is an updated
version.
Thanks
Ilya
--
gcc/
2015-03-10 Ilya Enkovich <ilya.enkov...@intel.com>
PR target/65103
* config/i386/i386.c (ix86_address_cost): Fix cost of a PIC
register.
gcc/testsuite/
2015-03-10 Ilya Enkovich <ilya.enkov...@intel.com>
PR target/65103
* gcc.target/i386/pr65103-1.c: New.
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index ab8f03a..06eacd0 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -12931,30 +12931,27 @@ ix86_address_cost (rtx x, machine_mode, addr_space_t,
bool)
if (parts.index && GET_CODE (parts.index) == SUBREG)
parts.index = SUBREG_REG (parts.index);
- /* Attempt to minimize number of registers in the address. */
- if ((parts.base
- && (!REG_P (parts.base) || REGNO (parts.base) >= FIRST_PSEUDO_REGISTER))
- || (parts.index
- && (!REG_P (parts.index)
- || REGNO (parts.index) >= FIRST_PSEUDO_REGISTER)))
- cost++;
+ /* Attempt to minimize number of registers in the address.
- /* When address base or index is "pic_offset_table_rtx" we don't increase
+ When address base or index is "pic_offset_table_rtx" we don't increase
address cost. When a memopt with "pic_offset_table_rtx" is not invariant
itself it most likely means that base or index is not invariant.
Therefore only "pic_offset_table_rtx" could be hoisted out, which is not
profitable for x86. */
if (parts.base
- && (current_pass->type == GIMPLE_PASS
- || (!pic_offset_table_rtx
- || REGNO (pic_offset_table_rtx) != REGNO(parts.base)))
&& (!REG_P (parts.base) || REGNO (parts.base) >= FIRST_PSEUDO_REGISTER)
- && parts.index
&& (current_pass->type == GIMPLE_PASS
- || (!pic_offset_table_rtx
- || REGNO (pic_offset_table_rtx) != REGNO(parts.index)))
+ || !pic_offset_table_rtx
+ || !REG_P (parts.base)
+ || REGNO (pic_offset_table_rtx) != REGNO (parts.base)))
+ cost++;
+
+ if (parts.index
&& (!REG_P (parts.index) || REGNO (parts.index) >= FIRST_PSEUDO_REGISTER)
- && parts.base != parts.index)
+ && (current_pass->type == GIMPLE_PASS
+ || !pic_offset_table_rtx
+ || !REG_P (parts.index)
+ || REGNO (pic_offset_table_rtx) != REGNO (parts.index)))
cost++;
/* AMD-K6 don't like addresses with ModR/M set to 00_xxx_100b,
diff --git a/gcc/testsuite/gcc.target/i386/pr65103-1.c
b/gcc/testsuite/gcc.target/i386/pr65103-1.c
new file mode 100644
index 0000000..4e3a7a3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr65103-1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile { target ia32 } } */
+/* { dg-require-effective-target pie } */
+/* { dg-options "-O2 -fPIE" } */
+/* { dg-final { scan-assembler-not "GOTOFF," } } */
+
+typedef struct S
+{
+ int a;
+ int sum;
+ int delta;
+} S;
+
+S gs;
+int global_opt (int max)
+{
+ while (gs.sum < max)
+ gs.sum += gs.delta;
+ return gs.a;
+}
