On 07/12/11 13:04, Andrew Stubbs wrote: > On 12/07/11 11:35, Georg-Johann Lay wrote: >> +(define_insn "*mulsu" >> + [(set (match_operand:HI 0 >> "register_operand" "=r") >> + (mult:HI (sign_extend:HI (match_operand:QI 1 >> "register_operand" "a")) >> + (zero_extend:HI (match_operand:QI 2 >> "register_operand" "a"))))] >> + "AVR_HAVE_MUL" >> + "mulsu %1,%2 >> + movw %0,r0 >> + clr __zero_reg__" >> + [(set_attr "length" "3") >> + (set_attr "cc" "clobber")]) >> + >> +(define_insn "*mulus" >> + [(set (match_operand:HI 0 >> "register_operand" "=r") >> + (mult:HI (zero_extend:HI (match_operand:QI 1 >> "register_operand" "a")) >> + (sign_extend:HI (match_operand:QI 2 >> "register_operand" "a"))))] >> + "AVR_HAVE_MUL" >> + "mulsu %2,%1 >> + movw %0,r0 >> + clr __zero_reg__" >> + [(set_attr "length" "3") >> + (set_attr "cc" "clobber")]) > > 1. You should name that "usmulqihi3" (no star), so the optimizers can > see it. > > 2. There's no need to define both of these. For one thing, putting a '%' > at the start of the constraint list for operand 1 does precisely this,
Unfortunately it doesn't. It won't swap the sign/zero-extend. Bernd
