On Mon, Jan 26, 2015 at 05:55:52PM +0800, Hale Wang wrote: > The GCC combine pass combines the insns even though they contain volatile > registers.
"Local register variable", "register asm". > This doesn't make sence. On the contrary, it makes a lot of sense: you *want* insns 41+43 to be combined in the below, that is the purpose of having local register variables at all! > The test case listed in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46164 > shows the expected asm command "mov r1, r1" is not generated."r1" is defined > as a volatile register, and there are three insns related to r1: > > (insn 98 97 40 3 (set (reg/v:SI 1 r1 [ b ]) (reg:SI 154 [ b ])) > (insn 41 40 43 3 (set (reg/f:SI 148) (reg/v:SI 1 r1 [ b ])) > (insn 43 41 45 3 (parallel [ > (set (reg/v:SI 0 r0 [ ret ]) > (asm_operands/v:SI ("mov %2, %2 mov %3, %3 mov %4, %4") > ("=r") 0 [ > (reg/v:SI 0 r0 [ a ]) > (reg/v:SI 1 r1 [ b ]) > (reg/v:SI 2 r2 [ c ]) > (mem/c:QI (reg/f:SI 148) [0 MEM[(char *)&temp]+0 S1 > A8]) 98+41 was not combined. Why? 41+43 was not combined. Why? Answer that and you likely know how to solve this problem properly :-) Segher
