On Sat, Jan 24, 2015 at 11:16:42AM +0100, Uros Bizjak wrote:
> On Sat, Jan 24, 2015 at 11:13 AM, Uros Bizjak <ubiz...@gmail.com> wrote:
> > On Sat, Jan 24, 2015 at 3:50 AM, H.J. Lu <hjl.to...@gmail.com> wrote:
> >> On Fri, Jan 23, 2015 at 06:37:01PM -0800, H.J. Lu wrote:
> >>> The new Silvermont aswell and Broadwell model numbers are in
> >>>
> >>> http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf
> >>>
> >>> This patch updates host_detect_local_cpu to check new Silvermont, Haswell
> >>> and Broadwell model numbers. OK for trunk and 4.9 branch?
> >>>
> >>> Thanks.
> >>>
> >>
> >> There are more model numbers in CHAPTER 35 MODEL-SPECIFIC REGISTERS (MSRS):
> >>
> >> http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-system-programming-manual-325384.pdf
> >>
> >> OK for trunk and 4.9 branch?
> >>
> >> Thanks.
> >>
> >>
> >> H.J.
> >> ---
> >> 2015-01-23 H.J. Lu <hongjiu...@intel.com>
> >>
> >> * config/i386/driver-i386.c (host_detect_local_cpu): Check new
> >> Silvermont, Haswell, Broadwell and Knights Landing model numbers.
> >
> > Please also update /libgcc/config/i386/cpuinfo.c and relevant testsuite
> > files.
>
> Huh, complete AVX512 handling is missing in the above file. Adding Kirill to
> CC:
>
Here is the updated patch. Tested on Ivy Bridge. OK for trunk and 4.9
branches?
I will leave AVX512 to Kirill.
Thanks.
H.J.
---
gcc/
2015-01-24 H.J. Lu <hongjiu...@intel.com>
* config/i386/driver-i386.c (host_detect_local_cpu): Check new
Silvermont, Haswell, Broadwell and Knights Landing model numbers.
* config/i386/i386.c (processor_model): Add
M_INTEL_COREI7_BROADWELL.
(arch_names_table): Add "broadwell".
gcc/testsuite/
2015-01-24 H.J. Lu <hongjiu...@intel.com>
* gcc.target/i386/builtin_target.c (check_intel_cpu_model): Add
Silvermont, Ivy Bridge, Haswell and Broadwell tests. Update Sandy
Bridge test.
libgcc/
2015-01-24 H.J. Lu <hongjiu...@intel.com>
* config/i386/cpuinfo.c (processor_subtypes): Add
INTEL_COREI7_BROADWELL.
(get_intel_cpu): Support new Silvermont, Haswell and Broadwell
model numbers.
diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c
index c731c50..c69149d 100644
--- a/gcc/config/i386/driver-i386.c
+++ b/gcc/config/i386/driver-i386.c
@@ -703,7 +703,10 @@ const char *host_detect_local_cpu (int argc, const char
**argv)
cpu = "bonnell";
break;
case 0x37:
+ case 0x4a:
case 0x4d:
+ case 0x5a:
+ case 0x5d:
/* Silvermont. */
cpu = "silvermont";
break;
@@ -738,11 +741,22 @@ const char *host_detect_local_cpu (int argc, const char
**argv)
cpu = "ivybridge";
break;
case 0x3c:
+ case 0x3f:
case 0x45:
case 0x46:
/* Haswell. */
cpu = "haswell";
break;
+ case 0x3d:
+ case 0x4f:
+ case 0x56:
+ /* Broadwell. */
+ cpu = "broadwell";
+ break;
+ case 0x57:
+ /* Knights Landing. */
+ cpu = "knl";
+ break;
default:
if (arch)
{
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index d10d3ff..b3ae575 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -35333,7 +35333,8 @@ fold_builtin_cpu (tree fndecl, tree *args)
M_AMDFAM15H_BDVER3,
M_AMDFAM15H_BDVER4,
M_INTEL_COREI7_IVYBRIDGE,
- M_INTEL_COREI7_HASWELL
+ M_INTEL_COREI7_HASWELL,
+ M_INTEL_COREI7_BROADWELL
};
static struct _arch_names_table
@@ -35354,6 +35355,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
{"sandybridge", M_INTEL_COREI7_SANDYBRIDGE},
{"ivybridge", M_INTEL_COREI7_IVYBRIDGE},
{"haswell", M_INTEL_COREI7_HASWELL},
+ {"broadwell", M_INTEL_COREI7_BROADWELL},
{"bonnell", M_INTEL_BONNELL},
{"silvermont", M_INTEL_SILVERMONT},
{"knl", M_INTEL_KNL},
diff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c
b/gcc/testsuite/gcc.target/i386/builtin_target.c
index b6a3eee..10c0568 100644
--- a/gcc/testsuite/gcc.target/i386/builtin_target.c
+++ b/gcc/testsuite/gcc.target/i386/builtin_target.c
@@ -30,6 +30,14 @@ check_intel_cpu_model (unsigned int family, unsigned int
model,
/* Atom. */
assert (__builtin_cpu_is ("atom"));
break;
+ case 0x37:
+ case 0x4a:
+ case 0x4d:
+ case 0x5a:
+ case 0x5d:
+ /* Silvermont. */
+ assert (__builtin_cpu_is ("silvermont"));
+ break;
case 0x1a:
case 0x1e:
case 0x1f:
@@ -46,10 +54,32 @@ check_intel_cpu_model (unsigned int family, unsigned int
model,
assert (__builtin_cpu_is ("westmere"));
break;
case 0x2a:
+ case 0x2d:
/* Sandy Bridge. */
assert (__builtin_cpu_is ("corei7"));
assert (__builtin_cpu_is ("sandybridge"));
break;
+ case 0x3a:
+ case 0x3e:
+ /* Ivy Bridge. */
+ assert (__builtin_cpu_is ("corei7"));
+ assert (__builtin_cpu_is ("ivybridge"));
+ break;
+ case 0x3c:
+ case 0x3f:
+ case 0x45:
+ case 0x46:
+ /* Haswell. */
+ assert (__builtin_cpu_is ("corei7"));
+ assert (__builtin_cpu_is ("haswell"));
+ break;
+ case 0x3d:
+ case 0x4f:
+ case 0x56:
+ /* Broadwell. */
+ assert (__builtin_cpu_is ("corei7"));
+ assert (__builtin_cpu_is ("broadwell"));
+ break;
case 0x17:
case 0x1d:
/* Penryn. */
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index f0a676b..c80083e 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -75,6 +75,7 @@ enum processor_subtypes
AMDFAM15H_BDVER4,
INTEL_COREI7_IVYBRIDGE,
INTEL_COREI7_HASWELL,
+ INTEL_COREI7_BROADWELL,
CPU_SUBTYPE_MAX
};
@@ -185,7 +186,10 @@ get_intel_cpu (unsigned int family, unsigned int model,
unsigned int brand_id)
__cpu_model.__cpu_type = INTEL_BONNELL;
break;
case 0x37:
+ case 0x4a:
case 0x4d:
+ case 0x5a:
+ case 0x5d:
/* Silvermont. */
__cpu_model.__cpu_type = INTEL_SILVERMONT;
break;
@@ -217,12 +221,20 @@ get_intel_cpu (unsigned int family, unsigned int model,
unsigned int brand_id)
__cpu_model.__cpu_subtype = INTEL_COREI7_IVYBRIDGE;
break;
case 0x3c:
+ case 0x3f:
case 0x45:
case 0x46:
/* Haswell. */
__cpu_model.__cpu_type = INTEL_COREI7;
__cpu_model.__cpu_subtype = INTEL_COREI7_HASWELL;
break;
+ case 0x3d:
+ case 0x4f:
+ case 0x56:
+ /* Broadwell. */
+ __cpu_model.__cpu_type = INTEL_COREI7;
+ __cpu_model.__cpu_subtype = INTEL_COREI7_BROADWELL;
+ break;
case 0x17:
case 0x1d:
/* Penryn. */
