On a multicore ARM, you really do have to clear both caches, not just the
dcache. This bug may exist in other ports too.
Andrew.
2011-07-11 Andrew Haley <a...@redhat.com>
* src/arm/ffi.c (FFI_INIT_TRAMPOLINE): Clear icache.
diff --git a/src/arm/ffi.c b/src/arm/ffi.c
index 885a9cb..b2e7667 100644
--- a/src/arm/ffi.c
+++ b/src/arm/ffi.c
@@ -558,12 +558,16 @@ ffi_closure_free (void *ptr)
({ unsigned char *__tramp = (unsigned char*)(TRAMP); \
unsigned int __fun = (unsigned int)(FUN); \
unsigned int __ctx = (unsigned int)(CTX); \
+ unsigned char *insns = (unsigned char *)(CTX); \
*(unsigned int*) &__tramp[0] = 0xe92d000f; /* stmfd sp!, {r0-r3} */ \
*(unsigned int*) &__tramp[4] = 0xe59f0000; /* ldr r0, [pc] */ \
*(unsigned int*) &__tramp[8] = 0xe59ff000; /* ldr pc, [pc] */ \
*(unsigned int*) &__tramp[12] = __ctx; \
*(unsigned int*) &__tramp[16] = __fun; \
- __clear_cache((&__tramp[0]), (&__tramp[19])); \
+ __clear_cache((&__tramp[0]), (&__tramp[19])); /* Clear data mapping. */ \
+ __clear_cache(insns, insns + 3 * sizeof (unsigned int)); \
+ /* Clear instruction \
+ mapping. */ \
})
#endif
