---
gcc/config/aarch64/aarch64.md | 2 +-
gcc/config/arm/types.md | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 1f6b1b6..98f4f30 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -391,7 +391,7 @@
return pftype[INTVAL(operands[1])][locality];
}
- [(set_attr "type" "load1")]
+ [(set_attr "type" "prefetch")]
)
(define_insn "trap"
diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md
index d368446..088c21a 100644
--- a/gcc/config/arm/types.md
+++ b/gcc/config/arm/types.md
@@ -118,6 +118,7 @@
; mvn_shift_reg inverting move instruction, shifted operand by a register.
; no_insn an insn which does not represent an instruction in the
; final output, thus having no impact on scheduling.
+; prefetch a prefetch instruction
; rbit reverse bits.
; rev reverse bytes.
; sdiv signed division.
@@ -556,6 +557,7 @@
call,\
clz,\
no_insn,\
+ prefetch,\
csel,\
crc,\
extend,\
--
1.9.1
