This patch is mostly mechanical:
Add some comment, break long lines, use CONST_INT_P instead of
CONST_INT == GET_CODE().
The targetm initializer is moved down in the file similar to m32c,
s390, alpha, etc. back ends.
That way a hook can be defined on the fly:
static foo_t
foo_hook (foo_args)
{
...
}
#undef FOO_HOOK
#define FOO_HOOK foo_hook
targetm = ...
instead of the redundant prototyping
static foo_t foo_hook (foo_args)
#undef FOO_HOOK
#define FOO_HOOK foo_hook
targetm = ...
foo_t
foo_hook (foo_args)
{
...
}
This reduced redundancy in avr.c and subsequent patches that
add/remove hooks will need less lines to be changed.
reg_class_tab is now local static and use smallest register class.
Tested without regressions.
Johann
* config/avr/avr.c (targetm): Move down.
(TARGET_ASM_ALIGNED_HI_OP): Move down.
(TARGET_ASM_ALIGNED_SI_OP): Move down.
(TARGET_ASM_UNALIGNED_HI_OP): Move down.
(TARGET_ASM_UNALIGNED_SI_OP): Move down.
(TARGET_ASM_INTEGER): Move down.
(TARGET_ASM_FILE_START): Move down.
(TARGET_ASM_FILE_END): Move down.
(TARGET_ASM_FUNCTION_END_PROLOGUE): Move down.
(TARGET_ASM_FUNCTION_BEGIN_EPILOGUE): Move down.
(TARGET_FUNCTION_VALUE): Move down.
(TARGET_LIBCALL_VALUE): Move down.
(TARGET_FUNCTION_VALUE_REGNO_P): Move down.
(TARGET_ATTRIBUTE_TABLE): Move down.
(TARGET_ASM_FUNCTION_RODATA_SECTION): Move down.
(TARGET_INSERT_ATTRIBUTES): Move down.
(TARGET_SECTION_TYPE_FLAGS): Move down.
(TARGET_ASM_INIT_SECTIONS): Move down.
(TARGET_ENCODE_SECTION_INFO): Move down.
(TARGET_REGISTER_MOVE_COST): Move down.
(TARGET_MEMORY_MOVE_COST): Move down.
(TARGET_RTX_COSTS): Move down.
(TARGET_ADDRESS_COST): Move down.
(TARGET_MACHINE_DEPENDENT_REORG): Move down.
(TARGET_FUNCTION_ARG): Move down.
(TARGET_FUNCTION_ARG_ADVANCE): Move down.
(TARGET_LEGITIMIZE_ADDRESS): Move down.
(TARGET_RETURN_IN_MEMORY): Move down.
(TARGET_STRICT_ARGUMENT_NAMING): Move down.
(TARGET_BUILTIN_SETJMP_FRAME_VALUE): Move down.
(TARGET_HARD_REGNO_SCRATCH_OK): Move down.
(TARGET_CASE_VALUES_THRESHOLD): Move down.
(TARGET_LEGITIMATE_ADDRESS_P): Move down.
(TARGET_FRAME_POINTER_REQUIRED): Move down.
(TARGET_CAN_ELIMINATE): Move down.
(TARGET_CLASS_LIKELY_SPILLED_P): Move down.
(TARGET_OPTION_OVERRIDE): Move down.
(TARGET_CANNOT_MODIFY_JUMPS_P): Move down.
(TARGET_FUNCTION_OK_FOR_SIBCALL): Move down.
(TARGET_INIT_BUILTINS): Move down.
(TARGET_EXPAND_BUILTIN): Move down.
(avr_operand_rtx_cost): Move down.
(avr_init_machine_status): Move up.
(avr_legitimize_address): Define on the fly.
(avr_legitimate_address_p): Define on the fly.
(avr_hard_regno_scratch_ok): Define on the fly.
(avr_builtin_setjmp_frame_value): Define on the fly.
(avr_case_values_threshold): Define on the fly.
(avr_can_eliminate): Define on the fly.
(avr_asm_named_section): Define on the fly.
(avr_frame_pointer_required_p): Define on the fly.
(avr_regnames): Remove unused variable.
(reg_class_tab): Use SIMPLE_LD_REGS for r16-r23.
Use NO_LD_REGS for r0-r15.
(avr_regno_reg_class): Incorporate reg_class_tab.
(out_movqi_r_mr): Use CONST_INT_P.
(out_movqi_mr_r): Use CONST_INT_P.
(output_movsisf): Use CONST_INT_P.
(out_shift_with_cnt): Use CONST_INT_P.
(ashlqi3_out): Use CONST_INT_P.
(ashlhi3_out): Use CONST_INT_P.
(ashlsi3_out): Use CONST_INT_P.
(ashrqi3_out): Use CONST_INT_P.
(ashrhi3_out): Use CONST_INT_P.
(ashrsi3_out): Use CONST_INT_P.
(lshrqi3_out): Use CONST_INT_P.
(lshrhi3_out): Use CONST_INT_P.
(lshrsi3_out): Use CONST_INT_P.
(adjust_insn_length): Use CONST_INT_P.
(avr_rtx_costs): Use CONST_INT_P.
(avr_address_cost): Use CONST_INT_P.
(extra_constraint_Q): Use CONST_INT_P.
(avr_reorg): Use CONST_INT_P.
(output_reload_inhi): Use CONST_INT_P.
(output_reload_insisf): Use CONST_INT_P.
(avr_out_sbxx_branch): Use CONST_INT_P.
(print_operand_address): Use CONST_INT_P.
(print_operand): Use CONST_INT_P.
(notice_update_cc): Use CONST_INT_P.
(avr_simplify_comparison_p): Use CONST_INT_P.
(output_movqi): Use CONST_INT_P.
(output_movhi): Use CONST_INT_P.
Fix long lines.
Index: config/avr/avr.c
===================================================================
--- config/avr/avr.c (revision 175629)
+++ config/avr/avr.c (working copy)
@@ -51,7 +51,6 @@
/* Maximal allowed offset for an address in the LD command */
#define MAX_LD_OFFSET(MODE) (64 - (signed)GET_MODE_SIZE (MODE))
-static void avr_option_override (void);
static int avr_naked_function_p (tree);
static int interrupt_function_p (tree);
static int signal_function_p (tree);
@@ -63,52 +62,12 @@ static int sequent_regs_live (void);
static const char *ptrreg_to_str (int);
static const char *cond_string (enum rtx_code);
static int avr_num_arg_regs (enum machine_mode, const_tree);
-
static RTX_CODE compare_condition (rtx insn);
-static rtx avr_legitimize_address (rtx, rtx, enum machine_mode);
static int compare_sign_p (rtx insn);
static tree avr_handle_progmem_attribute (tree *, tree, tree, int, bool *);
static tree avr_handle_fndecl_attribute (tree *, tree, tree, int, bool *);
static tree avr_handle_fntype_attribute (tree *, tree, tree, int, bool *);
-static bool avr_assemble_integer (rtx, unsigned int, int);
-static void avr_file_start (void);
-static void avr_file_end (void);
-static bool avr_legitimate_address_p (enum machine_mode, rtx, bool);
-static void avr_asm_function_end_prologue (FILE *);
-static void avr_asm_function_begin_epilogue (FILE *);
-static bool avr_cannot_modify_jumps_p (void);
-static rtx avr_function_value (const_tree, const_tree, bool);
-static rtx avr_libcall_value (enum machine_mode, const_rtx);
-static bool avr_function_value_regno_p (const unsigned int);
-static void avr_insert_attributes (tree, tree *);
-static void avr_asm_init_sections (void);
-static unsigned int avr_section_type_flags (tree, const char *, int);
-
-static void avr_reorg (void);
-static void avr_asm_out_ctor (rtx, int);
-static void avr_asm_out_dtor (rtx, int);
-static int avr_register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
-static int avr_memory_move_cost (enum machine_mode, reg_class_t, bool);
static int avr_operand_rtx_cost (rtx, enum machine_mode, enum rtx_code, bool);
-static bool avr_rtx_costs (rtx, int, int, int *, bool);
-static int avr_address_cost (rtx, bool);
-static bool avr_return_in_memory (const_tree, const_tree);
-static struct machine_function * avr_init_machine_status (void);
-static void avr_init_builtins (void);
-static rtx avr_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
-static rtx avr_builtin_setjmp_frame_value (void);
-static bool avr_hard_regno_scratch_ok (unsigned int);
-static unsigned int avr_case_values_threshold (void);
-static bool avr_frame_pointer_required_p (void);
-static bool avr_can_eliminate (const int, const int);
-static bool avr_class_likely_spilled_p (reg_class_t c);
-static rtx avr_function_arg (cumulative_args_t , enum machine_mode,
- const_tree, bool);
-static void avr_function_arg_advance (cumulative_args_t, enum machine_mode,
- const_tree, bool);
-static bool avr_function_ok_for_sibcall (tree, tree);
-static void avr_asm_named_section (const char *name, unsigned int flags, tree decl);
-static void avr_encode_section_info (tree, rtx, int);
/* Allocate registers from r25 to r8 for parameters for function calls. */
#define FIRST_CUM_REG 26
@@ -119,9 +78,6 @@ static GTY(()) rtx tmp_reg_rtx;
/* Zeroed register RTX (gen_rtx_REG (QImode, ZERO_REGNO)) */
static GTY(()) rtx zero_reg_rtx;
-/* AVR register names {"r0", "r1", ..., "r31"} */
-static const char *const avr_regnames[] = REGISTER_NAMES;
-
/* Preprocessor macros to define depending on MCU type. */
const char *avr_extra_arch_macro;
@@ -157,111 +113,17 @@ static const struct attribute_spec avr_a
{ NULL, 0, 0, false, false, false, NULL, false }
};
-/* Initialize the GCC target structure. */
-#undef TARGET_ASM_ALIGNED_HI_OP
-#define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
-#undef TARGET_ASM_ALIGNED_SI_OP
-#define TARGET_ASM_ALIGNED_SI_OP "\t.long\t"
-#undef TARGET_ASM_UNALIGNED_HI_OP
-#define TARGET_ASM_UNALIGNED_HI_OP "\t.word\t"
-#undef TARGET_ASM_UNALIGNED_SI_OP
-#define TARGET_ASM_UNALIGNED_SI_OP "\t.long\t"
-#undef TARGET_ASM_INTEGER
-#define TARGET_ASM_INTEGER avr_assemble_integer
-#undef TARGET_ASM_FILE_START
-#define TARGET_ASM_FILE_START avr_file_start
-#undef TARGET_ASM_FILE_END
-#define TARGET_ASM_FILE_END avr_file_end
-
-#undef TARGET_ASM_FUNCTION_END_PROLOGUE
-#define TARGET_ASM_FUNCTION_END_PROLOGUE avr_asm_function_end_prologue
-#undef TARGET_ASM_FUNCTION_BEGIN_EPILOGUE
-#define TARGET_ASM_FUNCTION_BEGIN_EPILOGUE avr_asm_function_begin_epilogue
-
-#undef TARGET_FUNCTION_VALUE
-#define TARGET_FUNCTION_VALUE avr_function_value
-#undef TARGET_LIBCALL_VALUE
-#define TARGET_LIBCALL_VALUE avr_libcall_value
-#undef TARGET_FUNCTION_VALUE_REGNO_P
-#define TARGET_FUNCTION_VALUE_REGNO_P avr_function_value_regno_p
-
-#undef TARGET_ATTRIBUTE_TABLE
-#define TARGET_ATTRIBUTE_TABLE avr_attribute_table
-#undef TARGET_ASM_FUNCTION_RODATA_SECTION
-#define TARGET_ASM_FUNCTION_RODATA_SECTION default_no_function_rodata_section
-#undef TARGET_INSERT_ATTRIBUTES
-#define TARGET_INSERT_ATTRIBUTES avr_insert_attributes
-#undef TARGET_SECTION_TYPE_FLAGS
-#define TARGET_SECTION_TYPE_FLAGS avr_section_type_flags
-
-/* `TARGET_ASM_NAMED_SECTION' must be defined in avr.h. */
-
-#undef TARGET_ASM_INIT_SECTIONS
-#define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
-#undef TARGET_ENCODE_SECTION_INFO
-#define TARGET_ENCODE_SECTION_INFO avr_encode_section_info
-
-#undef TARGET_REGISTER_MOVE_COST
-#define TARGET_REGISTER_MOVE_COST avr_register_move_cost
-#undef TARGET_MEMORY_MOVE_COST
-#define TARGET_MEMORY_MOVE_COST avr_memory_move_cost
-#undef TARGET_RTX_COSTS
-#define TARGET_RTX_COSTS avr_rtx_costs
-#undef TARGET_ADDRESS_COST
-#define TARGET_ADDRESS_COST avr_address_cost
-#undef TARGET_MACHINE_DEPENDENT_REORG
-#define TARGET_MACHINE_DEPENDENT_REORG avr_reorg
-#undef TARGET_FUNCTION_ARG
-#define TARGET_FUNCTION_ARG avr_function_arg
-#undef TARGET_FUNCTION_ARG_ADVANCE
-#define TARGET_FUNCTION_ARG_ADVANCE avr_function_arg_advance
-
-#undef TARGET_LEGITIMIZE_ADDRESS
-#define TARGET_LEGITIMIZE_ADDRESS avr_legitimize_address
-
-#undef TARGET_RETURN_IN_MEMORY
-#define TARGET_RETURN_IN_MEMORY avr_return_in_memory
-
-#undef TARGET_STRICT_ARGUMENT_NAMING
-#define TARGET_STRICT_ARGUMENT_NAMING hook_bool_CUMULATIVE_ARGS_true
-
-#undef TARGET_BUILTIN_SETJMP_FRAME_VALUE
-#define TARGET_BUILTIN_SETJMP_FRAME_VALUE avr_builtin_setjmp_frame_value
-
-#undef TARGET_HARD_REGNO_SCRATCH_OK
-#define TARGET_HARD_REGNO_SCRATCH_OK avr_hard_regno_scratch_ok
-#undef TARGET_CASE_VALUES_THRESHOLD
-#define TARGET_CASE_VALUES_THRESHOLD avr_case_values_threshold
-
-#undef TARGET_LEGITIMATE_ADDRESS_P
-#define TARGET_LEGITIMATE_ADDRESS_P avr_legitimate_address_p
-
-#undef TARGET_FRAME_POINTER_REQUIRED
-#define TARGET_FRAME_POINTER_REQUIRED avr_frame_pointer_required_p
-#undef TARGET_CAN_ELIMINATE
-#define TARGET_CAN_ELIMINATE avr_can_eliminate
-
-#undef TARGET_CLASS_LIKELY_SPILLED_P
-#define TARGET_CLASS_LIKELY_SPILLED_P avr_class_likely_spilled_p
-
-#undef TARGET_OPTION_OVERRIDE
-#define TARGET_OPTION_OVERRIDE avr_option_override
-
-#undef TARGET_CANNOT_MODIFY_JUMPS_P
-#define TARGET_CANNOT_MODIFY_JUMPS_P avr_cannot_modify_jumps_p
+/* Implement `TARGET_INIT_MACHINE_STATUS'. */
-#undef TARGET_FUNCTION_OK_FOR_SIBCALL
-#define TARGET_FUNCTION_OK_FOR_SIBCALL avr_function_ok_for_sibcall
-
-#undef TARGET_INIT_BUILTINS
-#define TARGET_INIT_BUILTINS avr_init_builtins
+static struct machine_function *
+avr_init_machine_status (void)
+{
+ return ggc_alloc_cleared_machine_function ();
+}
-#undef TARGET_EXPAND_BUILTIN
-#define TARGET_EXPAND_BUILTIN avr_expand_builtin
+/* Implement `TARGET_OPTION_OVERRIDE'. */
-struct gcc_target targetm = TARGET_INITIALIZER;
-
static void
avr_option_override (void)
{
@@ -277,36 +139,31 @@ avr_option_override (void)
init_machine_status = avr_init_machine_status;
}
-/* return register class from register number. */
-
-static const enum reg_class reg_class_tab[]={
- GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,
- GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,
- GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,GENERAL_REGS,
- GENERAL_REGS, /* r0 - r15 */
- LD_REGS,LD_REGS,LD_REGS,LD_REGS,LD_REGS,LD_REGS,LD_REGS,
- LD_REGS, /* r16 - 23 */
- ADDW_REGS,ADDW_REGS, /* r24,r25 */
- POINTER_X_REGS,POINTER_X_REGS, /* r26,27 */
- POINTER_Y_REGS,POINTER_Y_REGS, /* r28,r29 */
- POINTER_Z_REGS,POINTER_Z_REGS, /* r30,r31 */
- STACK_REG,STACK_REG /* SPL,SPH */
-};
-
-/* Function to set up the backend function structure. */
-
-static struct machine_function *
-avr_init_machine_status (void)
-{
- return ggc_alloc_cleared_machine_function ();
-}
+/* Implement `REGNO_REG_CLASS'. */
/* Return register class for register R. */
enum reg_class
avr_regno_reg_class (int r)
{
- if (r <= 33)
+ static const enum reg_class reg_class_tab[] =
+ {
+ /* r0 - r15 */
+ NO_LD_REGS, NO_LD_REGS, NO_LD_REGS, NO_LD_REGS,
+ NO_LD_REGS, NO_LD_REGS, NO_LD_REGS, NO_LD_REGS,
+ NO_LD_REGS, NO_LD_REGS, NO_LD_REGS, NO_LD_REGS,
+ NO_LD_REGS, NO_LD_REGS, NO_LD_REGS, NO_LD_REGS,
+ /* r16 - 23 */
+ SIMPLE_LD_REGS, SIMPLE_LD_REGS, SIMPLE_LD_REGS, SIMPLE_LD_REGS,
+ SIMPLE_LD_REGS, SIMPLE_LD_REGS, SIMPLE_LD_REGS, SIMPLE_LD_REGS,
+ ADDW_REGS, ADDW_REGS, /* r24,r25 */
+ POINTER_X_REGS, POINTER_X_REGS, /* r26,r27 */
+ POINTER_Y_REGS, POINTER_Y_REGS, /* r28,r29 */
+ POINTER_Z_REGS, POINTER_Z_REGS, /* r30,r31 */
+ STACK_REG, STACK_REG /* SPL,SPH */
+ };
+
+ if (r <= 33)
return reg_class_tab[r];
return ALL_REGS;
}
@@ -417,9 +274,11 @@ avr_regs_to_save (HARD_REG_SET *set)
return count;
}
+
+/* Implement `TARGET_CAN_ELIMINATE'. */
/* Return true if register FROM can be eliminated via register TO. */
-bool
+static bool
avr_can_eliminate (const int from, const int to)
{
return ((from == ARG_POINTER_REGNUM && to == FRAME_POINTER_REGNUM)
@@ -428,6 +287,8 @@ avr_can_eliminate (const int from, const
&& !frame_pointer_needed));
}
+
+/* Implement `INITIAL_ELIMINATION_OFFSET'. */
/* Compute offset between arg_pointer and frame_pointer. */
int
@@ -445,17 +306,22 @@ avr_initial_elimination_offset (int from
}
}
+
+/* Implement `TARGET_BUILTIN_SETJMP_FRAME_VALUE'. */
/* Actual start of frame is virtual_stack_vars_rtx this is offset from
frame pointer by +STARTING_FRAME_OFFSET.
Using saved frame = virtual_stack_vars_rtx - STARTING_FRAME_OFFSET
avoids creating add/sub of offset in nonlocal goto and setjmp. */
-rtx avr_builtin_setjmp_frame_value (void)
+static rtx
+avr_builtin_setjmp_frame_value (void)
{
return gen_rtx_MINUS (Pmode, virtual_stack_vars_rtx,
- gen_int_mode (STARTING_FRAME_OFFSET, Pmode));
+ gen_int_mode (STARTING_FRAME_OFFSET, Pmode));
}
+
+/* Implement `RETURN_ADDR_RTX'. */
/* Return contents of MEM at frame pointer + stack size + 1 (+2 if 3 byte PC).
This is return address of function. */
rtx
@@ -1082,10 +948,11 @@ avr_cannot_modify_jumps_p (void)
}
+/* Implement `TARGET_LEGITIMATE_ADDRESS_P'. */
/* Return nonzero if X (an RTX) is a legitimate memory address on the target
machine for a memory operand of mode MODE. */
-bool
+static bool
avr_legitimate_address_p (enum machine_mode mode, rtx x, bool strict)
{
enum reg_class r = NO_REGS;
@@ -1150,10 +1017,12 @@ avr_legitimate_address_p (enum machine_m
return r == NO_REGS ? 0 : (int)r;
}
+
+/* Implement `TARGET_LEGITIZE_ADDRESS'. */
/* Attempts to replace X with a valid
memory address for an operand of mode MODE */
-rtx
+static rtx
avr_legitimize_address (rtx x, rtx oldx, enum machine_mode mode)
{
x = oldx;
@@ -1195,7 +1064,8 @@ ptrreg_to_str (int regno)
case REG_Y: return "Y";
case REG_Z: return "Z";
default:
- output_operand_lossage ("address operand requires constraint for X, Y, or Z register");
+ output_operand_lossage ("address operand requires constraint "
+ "for X, Y, or Z register");
}
return NULL;
}
@@ -1231,6 +1101,8 @@ cond_string (enum rtx_code code)
}
}
+
+/* Implement `PRINT_OPERAND_ADDRESS'. */
/* Output ADDR to FILE as address. */
void
@@ -1257,17 +1129,19 @@ print_operand_address (FILE *file, rtx a
rtx x = addr;
if (GET_CODE (x) == CONST)
x = XEXP (x, 0);
- if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x,1)) == CONST_INT)
+ if (GET_CODE (x) == PLUS
+ && CONST_INT_P (XEXP (x,1)))
{
- /* Assembler gs() will implant word address. Make offset
- a byte offset inside gs() for assembler. This is
+ /* Assembler gs() will implant word address. Make offset
+ a byte offset inside gs() for assembler. This is
needed because the more logical (constant+gs(sym)) is not
- accepted by gas. For 128K and lower devices this is ok. For
- large devices it will create a Trampoline to offset from symbol
- which may not be what the user really wanted. */
+ accepted by gas. For 128K and lower devices this is ok.
+ For large devices it will create a Trampoline to offset
+ from symbol which may not be what the user really wanted. */
fprintf (file, "gs(");
output_addr_const (file, XEXP (x,0));
- fprintf (file,"+" HOST_WIDE_INT_PRINT_DEC ")", 2 * INTVAL (XEXP (x,1)));
+ fprintf (file,"+" HOST_WIDE_INT_PRINT_DEC ")",
+ 2 * INTVAL (XEXP (x,1)));
if (AVR_3_BYTE_PC)
if (warning (0, "pointer offset from symbol maybe incorrect"))
{
@@ -1288,6 +1162,7 @@ print_operand_address (FILE *file, rtx a
}
+/* Implement `PRINT_OPERAND'. */
/* Output X as assembler operand to file FILE. */
void
@@ -1315,7 +1190,7 @@ print_operand (FILE *file, rtx x, int co
else
fprintf (file, reg_names[true_regnum (x) + abcd]);
}
- else if (GET_CODE (x) == CONST_INT)
+ else if (CONST_INT_P (x))
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) + abcd);
else if (GET_CODE (x) == MEM)
{
@@ -1326,10 +1201,11 @@ print_operand (FILE *file, rtx x, int co
fatal_insn ("bad address, not a constant):", addr);
/* Assembler template with m-code is data - not progmem section */
if (text_segment_operand (addr, VOIDmode))
- if (warning ( 0, "accessing data memory with program memory address"))
+ if (warning (0, "accessing data memory with "
+ "program memory address"))
{
output_addr_const (stderr, addr);
- fprintf(stderr,"\n");
+ fprintf (stderr,"\n");
}
output_addr_const (file, addr);
}
@@ -1366,10 +1242,11 @@ print_operand (FILE *file, rtx x, int co
{
/* Constant progmem address - like used in jmp or call */
if (0 == text_segment_operand (x, VOIDmode))
- if (warning ( 0, "accessing program memory with data memory address"))
+ if (warning (0, "accessing program memory with "
+ "data memory address"))
{
output_addr_const (stderr, x);
- fprintf(stderr,"\n");
+ fprintf (stderr,"\n");
}
/* Use normal symbol for direct address no linker trampoline needed */
output_addr_const (file, x);
@@ -1392,6 +1269,8 @@ print_operand (FILE *file, rtx x, int co
print_operand_address (file, x);
}
+
+/* Implement `NOTICE_UPDATE_CC'. */
/* Update the condition code in the INSN. */
void
@@ -1454,7 +1333,7 @@ notice_update_cc (rtx body ATTRIBUTE_UNU
{
rtx x = XEXP (src, 1);
- if (GET_CODE (x) == CONST_INT
+ if (CONST_INT_P (x)
&& INTVAL (x) > 0
&& INTVAL (x) != 6)
{
@@ -1467,11 +1346,13 @@ notice_update_cc (rtx body ATTRIBUTE_UNU
}
}
+
+/* Implement `CLASS_MAX_NREGS'. */
/* Return maximum number of consecutive registers of
class CLASS needed to hold a value of mode MODE. */
int
-class_max_nregs (enum reg_class rclass ATTRIBUTE_UNUSED,enum machine_mode mode)
+class_max_nregs (enum reg_class rclass ATTRIBUTE_UNUSED, enum machine_mode mode)
{
return ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD);
}
@@ -1610,6 +1491,8 @@ byte_immediate_operand (rtx op, enum mac
&& INTVAL (op) <= 0xff && INTVAL (op) >= 0);
}
+
+/* Implement `FINAL_PRESCAN_INSN'. */
/* Output insn cost for next insn. */
void
@@ -1631,7 +1514,7 @@ avr_simplify_comparison_p (enum machine_
unsigned int max = (mode == QImode ? 0xff :
mode == HImode ? 0xffff :
mode == SImode ? 0xffffffff : 0);
- if (max && op && GET_CODE (x) == CONST_INT)
+ if (max && op && CONST_INT_P (x))
{
if (unsigned_condition (op) != op)
max >>= 1;
@@ -1644,15 +1527,18 @@ avr_simplify_comparison_p (enum machine_
}
+/* Implement `FUNCTION_ARG_REGNO_P'. */
/* Returns nonzero if REGNO is the number of a hard
register in which function arguments are sometimes passed. */
int
-function_arg_regno_p(int r)
+function_arg_regno_p (int r)
{
return (r >= 8 && r <= 25);
}
+
+/* Implement `INIT_CUMULATIVE_ARGS'. */
/* Initializing the variable cum for the state at the beginning
of the argument list. */
@@ -1688,6 +1574,8 @@ avr_num_arg_regs (enum machine_mode mode
return (size + 1) & ~1;
}
+
+/* Implement `TARGET_FUNCTION_ARG'. */
/* Controls whether a function argument is passed
in a register, and which register. */
@@ -1704,6 +1592,8 @@ avr_function_arg (cumulative_args_t cum_
return NULL_RTX;
}
+
+/* Implement `TARGET_FUNCTION_ARG_ADVANCE'. */
/* Update the summarizer variable CUM to advance past an argument
in the argument list. */
@@ -1848,7 +1738,7 @@ output_movqi (rtx insn, rtx operands[],
if (test_hard_reg_class (LD_REGS, dest)) /* ldi d,i */
return AS2 (ldi,%0,lo8(%1));
- if (GET_CODE (src) == CONST_INT)
+ if (CONST_INT_P (src))
{
if (src == const0_rtx) /* mov r,L */
return AS1 (clr,%0);
@@ -1970,7 +1860,7 @@ output_movhi (rtx insn, rtx operands[],
AS2 (ldi,%B0,hi8(%1)));
}
- if (GET_CODE (src) == CONST_INT)
+ if (CONST_INT_P (src))
{
if (src == const0_rtx) /* mov r,L */
{
@@ -2091,7 +1981,7 @@ out_movqi_r_mr (rtx insn, rtx op[], int
/* memory access by reg+disp */
else if (GET_CODE (x) == PLUS
&& REG_P (XEXP (x,0))
- && GET_CODE (XEXP (x,1)) == CONST_INT)
+ && CONST_INT_P (XEXP (x,1)))
{
if ((INTVAL (XEXP (x,1)) - GET_MODE_SIZE (GET_MODE (src))) >= 63)
{
@@ -2654,7 +2544,7 @@ output_movsisf(rtx insn, rtx operands[],
AS2 (ldi,%D0,hhi8(%1)));
}
- if (GET_CODE (src) == CONST_INT)
+ if (CONST_INT_P (src))
{
const char *const clr_op0 =
AVR_HAVE_MOVW ? (AS1 (clr,%A0) CR_TAB
@@ -2779,7 +2669,7 @@ out_movqi_mr_r (rtx insn, rtx op[], int
/* memory access by reg+disp */
else if (GET_CODE (x) == PLUS
&& REG_P (XEXP (x,0))
- && GET_CODE (XEXP (x,1)) == CONST_INT)
+ && CONST_INT_P (XEXP (x,1)))
{
if ((INTVAL (XEXP (x,1)) - GET_MODE_SIZE (GET_MODE (dest))) >= 63)
{
@@ -2967,9 +2857,11 @@ out_movhi_mr_r (rtx insn, rtx op[], int
return "";
}
+
+/* Implement `TARGET_FRAME_POINTER_REQUIRED'. */
/* Return 1 if frame pointer for current function required. */
-bool
+static bool
avr_frame_pointer_required_p (void)
{
return (cfun->calls_alloca
@@ -3100,7 +2992,7 @@ out_shift_with_cnt (const char *templ, r
if (len)
*len = 1;
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
int scratch = (GET_CODE (PATTERN (insn)) == PARALLEL);
int count = INTVAL (operands[2]);
@@ -3225,7 +3117,7 @@ out_shift_with_cnt (const char *templ, r
const char *
ashlqi3_out (rtx insn, rtx operands[], int *len)
{
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
int k;
@@ -3322,7 +3214,7 @@ ashlqi3_out (rtx insn, rtx operands[], i
const char *
ashlhi3_out (rtx insn, rtx operands[], int *len)
{
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
int scratch = (GET_CODE (PATTERN (insn)) == PARALLEL);
int ldi_ok = test_hard_reg_class (LD_REGS, operands[0]);
@@ -3580,7 +3472,7 @@ ashlhi3_out (rtx insn, rtx operands[], i
const char *
ashlsi3_out (rtx insn, rtx operands[], int *len)
{
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
int k;
int *t = len;
@@ -3670,7 +3562,7 @@ ashlsi3_out (rtx insn, rtx operands[], i
const char *
ashrqi3_out (rtx insn, rtx operands[], int *len)
{
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
int k;
@@ -3742,7 +3634,7 @@ ashrqi3_out (rtx insn, rtx operands[], i
const char *
ashrhi3_out (rtx insn, rtx operands[], int *len)
{
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
int scratch = (GET_CODE (PATTERN (insn)) == PARALLEL);
int ldi_ok = test_hard_reg_class (LD_REGS, operands[0]);
@@ -3906,7 +3798,7 @@ ashrhi3_out (rtx insn, rtx operands[], i
const char *
ashrsi3_out (rtx insn, rtx operands[], int *len)
{
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
int k;
int *t = len;
@@ -4004,7 +3896,7 @@ ashrsi3_out (rtx insn, rtx operands[], i
const char *
lshrqi3_out (rtx insn, rtx operands[], int *len)
{
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
int k;
@@ -4099,7 +3991,7 @@ lshrqi3_out (rtx insn, rtx operands[], i
const char *
lshrhi3_out (rtx insn, rtx operands[], int *len)
{
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
int scratch = (GET_CODE (PATTERN (insn)) == PARALLEL);
int ldi_ok = test_hard_reg_class (LD_REGS, operands[0]);
@@ -4356,7 +4248,7 @@ lshrhi3_out (rtx insn, rtx operands[], i
const char *
lshrsi3_out (rtx insn, rtx operands[], int *len)
{
- if (GET_CODE (operands[2]) == CONST_INT)
+ if (CONST_INT_P (operands[2]))
{
int k;
int *t = len;
@@ -4585,6 +4477,8 @@ avr_rotate_bytes (rtx operands[])
return true;
}
+
+/* Implement `ADJUST_INSN_LENGTH'. */
/* Modifies the length assigned to instruction INSN
LEN is the initially computed length of the insn. */
@@ -4629,7 +4523,7 @@ adjust_insn_length (rtx insn, int len)
}
else if (GET_CODE (op[1]) == AND)
{
- if (GET_CODE (XEXP (op[1],1)) == CONST_INT)
+ if (CONST_INT_P (XEXP (op[1],1)))
{
HOST_WIDE_INT mask = INTVAL (XEXP (op[1],1));
if (GET_MODE (op[1]) == SImode)
@@ -4644,7 +4538,7 @@ adjust_insn_length (rtx insn, int len)
}
else if (GET_CODE (op[1]) == IOR)
{
- if (GET_CODE (XEXP (op[1],1)) == CONST_INT)
+ if (CONST_INT_P (XEXP (op[1],1)))
{
HOST_WIDE_INT mask = INTVAL (XEXP (op[1],1));
if (GET_MODE (op[1]) == SImode)
@@ -4848,6 +4742,8 @@ _reg_unused_after (rtx insn, rtx reg)
return 1;
}
+
+/* Implement `TARGET_ASM_INTEGER'. */
/* Target hook for assembling integer objects. The AVR version needs
special handling for references to certain labels. */
@@ -4855,7 +4751,7 @@ static bool
avr_assemble_integer (rtx x, unsigned int size, int aligned_p)
{
if (size == POINTER_SIZE / BITS_PER_UNIT && aligned_p
- && text_segment_operand (x, VOIDmode) )
+ && text_segment_operand (x, VOIDmode))
{
fputs ("\t.word\tgs(", asm_out_file);
output_addr_const (asm_out_file, x);
@@ -4899,6 +4795,7 @@ avr_asm_declare_function_name (FILE *fil
}
+/* Implement `TARGET_CLASS_LIKELY_SPILLED_P'. */
/* Return value is nonzero if pseudos that have been
assigned to registers of class CLASS would likely be spilled
because registers of CLASS are needed for spill registers. */
@@ -5021,6 +4918,8 @@ avr_progmem_p (tree decl, tree attribute
return 0;
}
+
+/* Implement `TARGET_INSERT_ATTRIBUTES'. */
/* Add the section attribute if the variable is in progmem. */
static void
@@ -5034,9 +4933,11 @@ avr_insert_attributes (tree node, tree *
{
static const char dsec[] = ".progmem.data";
- *attributes = tree_cons (get_identifier ("section"),
- build_tree_list (NULL, build_string (strlen (dsec), dsec)),
- *attributes);
+ *attributes =
+ tree_cons (get_identifier ("section"),
+ build_tree_list (NULL,
+ build_string (strlen (dsec), dsec)),
+ *attributes);
}
else
{
@@ -5122,7 +5023,7 @@ avr_asm_init_sections (void)
/* Implement `TARGET_ASM_NAMED_SECTION'. */
/* Track need of __do_clear_bss, __do_copy_data for named sections. */
-void
+static void
avr_asm_named_section (const char *name, unsigned int flags, tree decl)
{
if (!avr_need_copy_data_p)
@@ -5136,6 +5037,9 @@ avr_asm_named_section (const char *name,
default_elf_asm_named_section (name, flags, decl);
}
+
+/* Implement `TARGET_SECTION_TYPE_FLAGS'. */
+
static unsigned int
avr_section_type_flags (tree decl, const char *name, int reloc)
{
@@ -5224,6 +5128,8 @@ avr_file_end (void)
fputs (".global __do_clear_bss\n", asm_out_file);
}
+
+/* Implement `ADJUST_REG_ALLOC_ORDER'. */
/* Choose the order in which to allocate hard registers for
pseudo-registers local to a basic block.
@@ -5296,7 +5202,8 @@ avr_register_move_cost (enum machine_mod
/* Implement `TARGET_MEMORY_MOVE_COST' */
static int
-avr_memory_move_cost (enum machine_mode mode, reg_class_t rclass ATTRIBUTE_UNUSED,
+avr_memory_move_cost (enum machine_mode mode,
+ reg_class_t rclass ATTRIBUTE_UNUSED,
bool in ATTRIBUTE_UNUSED)
{
return (mode == QImode ? 2
@@ -5307,37 +5214,7 @@ avr_memory_move_cost (enum machine_mode
}
-/* Mutually recursive subroutine of avr_rtx_cost for calculating the
- cost of an RTX operand given its context. X is the rtx of the
- operand, MODE is its mode, and OUTER is the rtx_code of this
- operand's parent operator. */
-
-static int
-avr_operand_rtx_cost (rtx x, enum machine_mode mode, enum rtx_code outer,
- bool speed)
-{
- enum rtx_code code = GET_CODE (x);
- int total;
-
- switch (code)
- {
- case REG:
- case SUBREG:
- return 0;
-
- case CONST_INT:
- case CONST_DOUBLE:
- return COSTS_N_INSNS (GET_MODE_SIZE (mode));
-
- default:
- break;
- }
-
- total = 0;
- avr_rtx_costs (x, code, outer, &total, speed);
- return total;
-}
-
+/* Implement `TARGET_RTX_COSTS'. */
/* The AVR backend's rtx_cost function. X is rtx expression whose cost
is to be calculated. Return true if the complete cost has been
computed, and false if subexpressions should be scanned. In either
@@ -5424,12 +5301,12 @@ avr_rtx_costs (rtx x, int codearg, int o
{
case QImode:
*total = COSTS_N_INSNS (1);
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
break;
case HImode:
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
{
*total = COSTS_N_INSNS (2);
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
@@ -5441,7 +5318,7 @@ avr_rtx_costs (rtx x, int codearg, int o
break;
case SImode:
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
{
*total = COSTS_N_INSNS (4);
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
@@ -5463,7 +5340,7 @@ avr_rtx_costs (rtx x, int codearg, int o
case IOR:
*total = COSTS_N_INSNS (GET_MODE_SIZE (mode));
*total += avr_operand_rtx_cost (XEXP (x, 0), mode, code, speed);
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
return true;
@@ -5552,7 +5429,7 @@ avr_rtx_costs (rtx x, int codearg, int o
switch (mode)
{
case QImode:
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
{
*total = COSTS_N_INSNS (!speed ? 4 : 17);
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
@@ -5570,7 +5447,7 @@ avr_rtx_costs (rtx x, int codearg, int o
break;
case HImode:
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
{
*total = COSTS_N_INSNS (!speed ? 5 : 41);
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
@@ -5615,7 +5492,7 @@ avr_rtx_costs (rtx x, int codearg, int o
break;
case SImode:
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
{
*total = COSTS_N_INSNS (!speed ? 7 : 113);
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
@@ -5656,7 +5533,7 @@ avr_rtx_costs (rtx x, int codearg, int o
switch (mode)
{
case QImode:
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
{
*total = COSTS_N_INSNS (!speed ? 4 : 17);
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
@@ -5676,7 +5553,7 @@ avr_rtx_costs (rtx x, int codearg, int o
break;
case HImode:
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
{
*total = COSTS_N_INSNS (!speed ? 5 : 41);
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
@@ -5720,7 +5597,7 @@ avr_rtx_costs (rtx x, int codearg, int o
break;
case SImode:
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
{
*total = COSTS_N_INSNS (!speed ? 7 : 113);
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
@@ -5761,7 +5638,7 @@ avr_rtx_costs (rtx x, int codearg, int o
switch (mode)
{
case QImode:
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
{
*total = COSTS_N_INSNS (!speed ? 4 : 17);
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
@@ -5779,7 +5656,7 @@ avr_rtx_costs (rtx x, int codearg, int o
break;
case HImode:
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
{
*total = COSTS_N_INSNS (!speed ? 5 : 41);
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
@@ -5826,7 +5703,7 @@ avr_rtx_costs (rtx x, int codearg, int o
break;
case SImode:
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
{
*total = COSTS_N_INSNS (!speed ? 7 : 113);
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
@@ -5868,13 +5745,13 @@ avr_rtx_costs (rtx x, int codearg, int o
{
case QImode:
*total = COSTS_N_INSNS (1);
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
break;
case HImode:
*total = COSTS_N_INSNS (2);
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
else if (INTVAL (XEXP (x, 1)) != 0)
*total += COSTS_N_INSNS (1);
@@ -5882,7 +5759,7 @@ avr_rtx_costs (rtx x, int codearg, int o
case SImode:
*total = COSTS_N_INSNS (4);
- if (GET_CODE (XEXP (x, 1)) != CONST_INT)
+ if (!CONST_INT_P (XEXP (x, 1)))
*total += avr_operand_rtx_cost (XEXP (x, 1), mode, code, speed);
else if (INTVAL (XEXP (x, 1)) != 0)
*total += COSTS_N_INSNS (3);
@@ -5900,13 +5777,47 @@ avr_rtx_costs (rtx x, int codearg, int o
return false;
}
+
+/* Mutually recursive subroutine of avr_rtx_cost for calculating the
+ cost of an RTX operand given its context. X is the rtx of the
+ operand, MODE is its mode, and OUTER is the rtx_code of this
+ operand's parent operator. */
+
+static int
+avr_operand_rtx_cost (rtx x, enum machine_mode mode, enum rtx_code outer,
+ bool speed)
+{
+ enum rtx_code code = GET_CODE (x);
+ int total;
+
+ switch (code)
+ {
+ case REG:
+ case SUBREG:
+ return 0;
+
+ case CONST_INT:
+ case CONST_DOUBLE:
+ return COSTS_N_INSNS (GET_MODE_SIZE (mode));
+
+ default:
+ break;
+ }
+
+ total = 0;
+ avr_rtx_costs (x, code, outer, &total, speed);
+ return total;
+}
+
+
+/* Implement `TARGET_ADDRESS_COST'. */
/* Calculate the cost of a memory address. */
static int
avr_address_cost (rtx x, bool speed ATTRIBUTE_UNUSED)
{
if (GET_CODE (x) == PLUS
- && GET_CODE (XEXP (x,1)) == CONST_INT
+ && CONST_INT_P (XEXP (x,1))
&& (REG_P (XEXP (x,0)) || GET_CODE (XEXP (x,0)) == SUBREG)
&& INTVAL (XEXP (x,1)) >= 61)
return 18;
@@ -5927,7 +5838,7 @@ extra_constraint_Q (rtx x)
{
if (GET_CODE (XEXP (x,0)) == PLUS
&& REG_P (XEXP (XEXP (x,0), 0))
- && GET_CODE (XEXP (XEXP (x,0), 1)) == CONST_INT
+ && CONST_INT_P (XEXP (XEXP (x,0), 1))
&& (INTVAL (XEXP (XEXP (x,0), 1))
<= MAX_LD_OFFSET (GET_MODE (x))))
{
@@ -5972,6 +5883,8 @@ avr_normalize_condition (RTX_CODE condit
}
}
+
+/* Implement `TARGET_MACHINE_DEPENDENT_REORG'. */
/* This function optimizes conditional jumps. */
static void
@@ -6029,7 +5942,7 @@ avr_reorg (void)
INSN_CODE (insn) = -1;
}
else if (true_regnum (XEXP (pattern,0)) >= 0
- && GET_CODE (XEXP (pattern,1)) == CONST_INT)
+ && CONST_INT_P (XEXP (pattern,1)))
{
rtx x = XEXP (pattern,1);
rtx next = next_real_insn (insn);
@@ -6067,6 +5980,8 @@ avr_function_value_regno_p (const unsign
return (regno == avr_ret_register ());
}
+
+/* Implement `TARGET_LIBCALL_VALUE'. */
/* Create an RTX representing the place where a
library function returns a value of mode MODE. */
@@ -6080,6 +5995,8 @@ avr_libcall_value (enum machine_mode mod
return gen_rtx_REG (mode, avr_ret_register () + 2 - offs);
}
+
+/* Implement `TARGET_FUNCTION_VALUE'. */
/* Create an RTX representing the place where a
function returns a value of data type VALTYPE. */
@@ -6129,6 +6046,8 @@ jump_over_one_insn_p (rtx insn, rtx dest
return dest_addr - jump_addr == get_attr_length (insn) + 1;
}
+
+/* Implement `HARD_REGNO_MODE_OK'. */
/* Returns 1 if a value of mode MODE can be stored starting with hard
register number REGNO. On the enhanced core, anything larger than
1 byte must start in even numbered register for "movw" to work
@@ -6167,7 +6086,7 @@ output_reload_inhi (rtx insn ATTRIBUTE_U
if (!len)
len = &tmp;
- if (GET_CODE (operands[1]) == CONST_INT)
+ if (CONST_INT_P (operands[1]))
{
int val = INTVAL (operands[1]);
if ((val & 0xff) == 0)
@@ -6204,7 +6123,7 @@ const char *
output_reload_insisf (rtx insn ATTRIBUTE_UNUSED, rtx *operands, int *len)
{
rtx src = operands[1];
- int cnst = (GET_CODE (src) == CONST_INT);
+ int cnst = CONST_INT_P (src);
if (len)
{
@@ -6260,6 +6179,9 @@ avr_output_bld (rtx operands[], int bit_
output_asm_insn (s, operands);
}
+
+/* Implement `ASM_OUTPUT_ADDR_VEC_ELT'. */
+
void
avr_output_addr_vec_elt (FILE *stream, int value)
{
@@ -6270,10 +6192,12 @@ avr_output_addr_vec_elt (FILE *stream, i
fprintf (stream, "\trjmp .L%d\n", value);
}
+
+/* Implement `TARGET_HARD_REGNO_SCRATCH_OK'. */
/* Returns true if SCRATCH are safe to be allocated as a scratch
registers (for a define_peephole2) in the current function. */
-bool
+static bool
avr_hard_regno_scratch_ok (unsigned int regno)
{
/* Interrupt functions can only use registers that have already been saved
@@ -6286,6 +6210,8 @@ avr_hard_regno_scratch_ok (unsigned int
return true;
}
+
+/* Implement `HARD_REGNO_RENAME_OK'. */
/* Return nonzero if register OLD_REG can be renamed to register NEW_REG. */
int
@@ -6326,7 +6252,7 @@ avr_out_sbxx_branch (rtx insn, rtx opera
if (reverse)
comp = reverse_condition (comp);
- if (GET_CODE (operands[1]) == CONST_INT)
+ if (CONST_INT_P (operands[1]))
{
if (INTVAL (operands[1]) < 0x40)
{
@@ -6406,7 +6332,8 @@ avr_return_in_memory (const_tree type, c
/* Worker function for CASE_VALUES_THRESHOLD. */
-unsigned int avr_case_values_threshold (void)
+static unsigned int
+avr_case_values_threshold (void)
{
return (!AVR_HAVE_JMP_CALL || TARGET_CALL_PROLOGUES) ? 8 : 17;
}
@@ -6718,8 +6645,9 @@ avr_expand_builtin (tree exp, rtx target
arg0 = CALL_EXPR_ARG (exp, 0);
op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL);
- if (! CONST_INT_P (op0))
- error ("__builtin_avr_delay_cycles expects a compile time integer constant.");
+ if (!CONST_INT_P (op0))
+ error ("__builtin_avr_delay_cycles expects a "
+ "compile time integer constant.");
avr_expand_delay_cycles (op0);
return 0;
@@ -6737,5 +6665,112 @@ avr_expand_builtin (tree exp, rtx target
gcc_unreachable ();
}
+
+
+/* Initialize the GCC target structure. */
+
+#undef TARGET_ASM_ALIGNED_HI_OP
+#define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
+#undef TARGET_ASM_ALIGNED_SI_OP
+#define TARGET_ASM_ALIGNED_SI_OP "\t.long\t"
+#undef TARGET_ASM_UNALIGNED_HI_OP
+#define TARGET_ASM_UNALIGNED_HI_OP "\t.word\t"
+#undef TARGET_ASM_UNALIGNED_SI_OP
+#define TARGET_ASM_UNALIGNED_SI_OP "\t.long\t"
+#undef TARGET_ASM_INTEGER
+#define TARGET_ASM_INTEGER avr_assemble_integer
+#undef TARGET_ASM_FILE_START
+#define TARGET_ASM_FILE_START avr_file_start
+#undef TARGET_ASM_FILE_END
+#define TARGET_ASM_FILE_END avr_file_end
+
+#undef TARGET_ASM_FUNCTION_END_PROLOGUE
+#define TARGET_ASM_FUNCTION_END_PROLOGUE avr_asm_function_end_prologue
+#undef TARGET_ASM_FUNCTION_BEGIN_EPILOGUE
+#define TARGET_ASM_FUNCTION_BEGIN_EPILOGUE avr_asm_function_begin_epilogue
+
+#undef TARGET_FUNCTION_VALUE
+#define TARGET_FUNCTION_VALUE avr_function_value
+#undef TARGET_LIBCALL_VALUE
+#define TARGET_LIBCALL_VALUE avr_libcall_value
+#undef TARGET_FUNCTION_VALUE_REGNO_P
+#define TARGET_FUNCTION_VALUE_REGNO_P avr_function_value_regno_p
+
+#undef TARGET_ATTRIBUTE_TABLE
+#define TARGET_ATTRIBUTE_TABLE avr_attribute_table
+#undef TARGET_ASM_FUNCTION_RODATA_SECTION
+#define TARGET_ASM_FUNCTION_RODATA_SECTION default_no_function_rodata_section
+#undef TARGET_INSERT_ATTRIBUTES
+#define TARGET_INSERT_ATTRIBUTES avr_insert_attributes
+#undef TARGET_SECTION_TYPE_FLAGS
+#define TARGET_SECTION_TYPE_FLAGS avr_section_type_flags
+
+/* `TARGET_ASM_NAMED_SECTION' must be defined in avr.h. */
+
+#undef TARGET_ASM_INIT_SECTIONS
+#define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
+#undef TARGET_ENCODE_SECTION_INFO
+#define TARGET_ENCODE_SECTION_INFO avr_encode_section_info
+
+#undef TARGET_REGISTER_MOVE_COST
+#define TARGET_REGISTER_MOVE_COST avr_register_move_cost
+#undef TARGET_MEMORY_MOVE_COST
+#define TARGET_MEMORY_MOVE_COST avr_memory_move_cost
+#undef TARGET_RTX_COSTS
+#define TARGET_RTX_COSTS avr_rtx_costs
+#undef TARGET_ADDRESS_COST
+#define TARGET_ADDRESS_COST avr_address_cost
+#undef TARGET_MACHINE_DEPENDENT_REORG
+#define TARGET_MACHINE_DEPENDENT_REORG avr_reorg
+#undef TARGET_FUNCTION_ARG
+#define TARGET_FUNCTION_ARG avr_function_arg
+#undef TARGET_FUNCTION_ARG_ADVANCE
+#define TARGET_FUNCTION_ARG_ADVANCE avr_function_arg_advance
+
+#undef TARGET_LEGITIMIZE_ADDRESS
+#define TARGET_LEGITIMIZE_ADDRESS avr_legitimize_address
+
+#undef TARGET_RETURN_IN_MEMORY
+#define TARGET_RETURN_IN_MEMORY avr_return_in_memory
+
+#undef TARGET_STRICT_ARGUMENT_NAMING
+#define TARGET_STRICT_ARGUMENT_NAMING hook_bool_CUMULATIVE_ARGS_true
+
+#undef TARGET_BUILTIN_SETJMP_FRAME_VALUE
+#define TARGET_BUILTIN_SETJMP_FRAME_VALUE avr_builtin_setjmp_frame_value
+
+#undef TARGET_HARD_REGNO_SCRATCH_OK
+#define TARGET_HARD_REGNO_SCRATCH_OK avr_hard_regno_scratch_ok
+#undef TARGET_CASE_VALUES_THRESHOLD
+#define TARGET_CASE_VALUES_THRESHOLD avr_case_values_threshold
+
+#undef TARGET_LEGITIMATE_ADDRESS_P
+#define TARGET_LEGITIMATE_ADDRESS_P avr_legitimate_address_p
+
+#undef TARGET_FRAME_POINTER_REQUIRED
+#define TARGET_FRAME_POINTER_REQUIRED avr_frame_pointer_required_p
+#undef TARGET_CAN_ELIMINATE
+#define TARGET_CAN_ELIMINATE avr_can_eliminate
+
+#undef TARGET_CLASS_LIKELY_SPILLED_P
+#define TARGET_CLASS_LIKELY_SPILLED_P avr_class_likely_spilled_p
+
+#undef TARGET_OPTION_OVERRIDE
+#define TARGET_OPTION_OVERRIDE avr_option_override
+
+#undef TARGET_CANNOT_MODIFY_JUMPS_P
+#define TARGET_CANNOT_MODIFY_JUMPS_P avr_cannot_modify_jumps_p
+
+#undef TARGET_FUNCTION_OK_FOR_SIBCALL
+#define TARGET_FUNCTION_OK_FOR_SIBCALL avr_function_ok_for_sibcall
+
+#undef TARGET_INIT_BUILTINS
+#define TARGET_INIT_BUILTINS avr_init_builtins
+
+#undef TARGET_EXPAND_BUILTIN
+#define TARGET_EXPAND_BUILTIN avr_expand_builtin
+
+
+struct gcc_target targetm = TARGET_INITIALIZER;
#include "gt-avr.h"
