On 04/06/11 10:29, Michael Matz wrote:
Hi,
On Mon, 4 Apr 2011, Aldy Hernandez wrote:
(5) Do we agree that all such cpus use a byte-granular modification mask?
Now, as of (0) I might agree to disregard the original Alpha, but as the
embedded world moves to SMP I'm not sure we can disregard
non-cache coherent NUMA setups or even CPUs without a byte store.
As per 5, it doesn't matter if the CPU lacks a byte store, since the
cache has a byte-granular modification mask.
If it doesn't have byte stores there's no need for byte-granular
modification masks :)
I was talking about a CPU with a byte store that is implemented in the
microcode with a wider operation and logical operations that may touch
adjacent fields. If adjacent bytes were touched, the cache would be
updated accordingly, hence the byte-granular modification mask. That's
my understanding anyhow.
