Hi Jeff, Hi Alex, Hi Richard,
The MN10300 gcc port currently does not build on the mainline because
of:
In file included from gcc/unwind-dw2-fde.c:35:0:
gcc/unwind-pe.h: In function 'read_encoded_value_with_base':
gcc/unwind-pe.h:271:1: error: insn does not satisfy its constraints:
(insn 417 381 382 7 (set (reg/v:QI 50 mdr [orig:145 encoding ] [145])
(reg:QI 0 d0)) 0 {*movqi_internal}
(nil))
Ie the movqi insn does not handle the MDR register. (A similar issue
affects the movhi insn, although that is not triggered until later on
in the toolchain build). I would like to propose the attached small
patch to fix this problem.
Tested without regressions on an mn10300-elf toolchain.
OK to apply ?
Cheers
Nick
gcc/ChangeLog
2011-04-05 Nick Clifton <ni...@redhat.com>
* config/mn10300/mn10300.md (movqi_internal): Add alternatives
to handle MDR <-> data register transfers.
(movhi_internal): Likewise.
Index: gcc/config/mn10300/mn10300.md
===================================================================
--- gcc/config/mn10300/mn10300.md (revision 172019)
+++ gcc/config/mn10300/mn10300.md (working copy)
@@ -239,8 +239,8 @@
})
(define_insn "*movqi_internal"
- [(set (match_operand:QI 0 "nonimmediate_operand" "=*r,D*r,D*r,D,m")
- (match_operand:QI 1 "general_operand" " 0,D*r, i,m,D"))]
+ [(set (match_operand:QI 0 "nonimmediate_operand" "=*r,D*r,D*r,D,m,*z,d")
+ (match_operand:QI 1 "general_operand" " 0,D*r, i,m,D,d,*z"))]
"(register_operand (operands[0], QImode)
|| register_operand (operands[1], QImode))"
{
@@ -250,6 +250,8 @@
return "";
case 1:
case 2:
+ case 5:
+ case 6:
return "mov %1,%0";
case 3:
case 4:
@@ -266,6 +268,8 @@
(const_int 13) (const_int 24))
(if_then_else (eq_attr "cpu" "am34")
(const_int 11) (const_int 22))
+ (const_int 11)
+ (const_int 11)
])]
)
@@ -283,8 +287,8 @@
})
(define_insn "*movhi_internal"
- [(set (match_operand:HI 0 "nonimmediate_operand" "=*r,D*r,D*r,D,m")
- (match_operand:HI 1 "general_operand" " 0, i,D*r,m,D"))]
+ [(set (match_operand:HI 0 "nonimmediate_operand" "=*r,D*r,D*r,D,m,*z,d")
+ (match_operand:HI 1 "general_operand" " 0, i,D*r,m,D,d,*z"))]
"(register_operand (operands[0], HImode)
|| register_operand (operands[1], HImode))"
{
@@ -302,6 +306,8 @@
&& REGNO_EXTENDED_P (REGNO (operands[0]), 1))
return "movu %1,%0";
/* FALLTHRU */
+ case 5:
+ case 6:
case 2:
return "mov %1,%0";
case 3:
@@ -320,6 +326,10 @@
(const_int 13) (const_int 24))
(if_then_else (eq_attr "cpu" "am34")
(const_int 11) (const_int 22))
+ (if_then_else (eq_attr "cpu" "am34")
+ (const_int 11) (const_int 22))
+ (if_then_else (eq_attr "cpu" "am34")
+ (const_int 11) (const_int 22))
])]
)
