The branch 'meissner/heads/work255-bugs' was updated to point to:
419f306a4521... Merge commit 'refs/users/meissner/heads/work255-bugs' of gi
It previously pointed to:
0d1f06e619f2... Update ChangeLog.*
Diff:
Summary of changes (added commits):
-----------------------------------
419f306... Merge commit 'refs/users/meissner/heads/work255-bugs' of gi
a28365f... Update ChangeLog.*
83ab089... PR target/120681 - allow -mcmodel=large with PC relative ad
2b9ac3b... PR target/108958 -- simplify mtvsrdd to zero extend GPR DIm
9f8ed20... PR target/120528 -- Simplify zero extend from memory to VSX
3fa718b... PR target/992493: Optimize splat of a V2DF/V2DI extract wit
45482d1... PR target/117487: Add power9 and power10 float to logical o
0cc5079... Add ChangeLog.bugs and update REVISION.
88bed72... Merge commit 'refs/users/meissner/heads/work255' of git+ssh (*)
5033082... Add ChangeLog.meissner and REVISION. (*)
1521151... [frange] Convert operator_abs::fold_range to sub-ranges. (*)
7597853... [frange] Convert operator_negate::fold_range to sub-ranges. (*)
ab5addf... [frange] Convert frange_add_zeros to multi-range (*)
c07fc7b... match: fold two idioms built from the negation of a value (*)
d55b885... i386: Use %w operand modifier for ROLW bswaphisi2_lowpart a (*)
b9c9f93... Handle sub-ranges in frange == and != operators [PR126637] (*)
2ec8e0d... Remove the free-standing contains_zero_p in favor of the me (*)
ac3a213... aarch64: delete vaddd_s64 and vaddd_u64 from arm_neon.h [PR (*)
c2cc06f... Fix latent issue in call vectorization (*)
9cf7c32... vect: Recognise high-part multiply when the wide type has n (*)
14b226a... middle-end/123175 - fix vec_perm_indices construction in se (*)
d23698b... testsuite: Handle C++29 in libstdc++ std module exports plu (*)
2314d04... testsuite: Handle C++29 in libstdc++ uglification plugin (*)
24754ac... c++: Fix mangling of empty anon union/struct unnamed NSDMs (*)
467a2e2... Remove nonzero_p. (*)
679c673... Implement the exact nonzero-set test without nonzero_p. (*)
d428b01... Use !contains_zero_p for known nonzero tests instead of non (*)
9231e36... Add contains_zero_p to the vrange hierarchy. (*)
aa35616... match: Combine several patterns into fors. (*)
4f751c0... c++: Mangling fix for type alias reflections [PR125680] (*)
1a9d7ee... testsuite: Add yet another [[clang::no_specializations]] te (*)
72c3436... libcpp, c-family: Implement C++29 P3733R1 - More named univ (*)
393a84e... Fix up cpp_check_xid_property (used by rust) (*)
b200f4d... libcpp: Implement C++29 P3658R1 - Adjust identifier followi (*)
d2b8724... c++: Reject std::initializer_list with bases [PR125647] (*)
75ee896... aarch64: Implement vector DImode high-part multiply using S (*)
94843e8... c++: Fix up constexpr handling of break in expansion statem (*)
7ebe4eb... match: fold a remainder compared with its dividend (*)
091a150... c++: Fix structured binding pack instantiation ICE [PR12559 (*)
fde81f0... Use chain_index in callback_only attribute handler. (*)
cad654e... Add the callback_only attribute. (*)
19a304d... testsuite: Clarify the std module export plugin diagnostics (*)
7b87f41... libcpp: Fix up ICE with __VA_OPT__ [PR125048] (*)
d609ca7... c++: implement C++29 P2287R6 - Designated-initializers for (*)
c80ac3c... RISC-V: Don't let popretz combine across a call [PR target/ (*)
a624395... i386: Fix up recent cpuinfo.h change for FEATURE_AVX10V2AUX (*)
c3526f4... RISC-V: Don't synthesize VLS vector constants. (*)
245e329... libga68: regenerate configure (*)
487ed3d... RISC-V: Return implied_exts by const reference (*)
44cc8e5... i386: Fix __get_cpuid() and __get_cpuid_count() for Centaur (*)
cd65161... phiopt/cselim: Allow a load between the load and the store (*)
fd1bc53... match.pd: add the inclusive or dual of the masked compariso (*)
9a72a88... [PATCH 2/2] alpha: keep the exception receiver's gpdisp pai (*)
e0e794b... [PATCH] RISC-V: Implement reassociation width hook (*)
56d9817... RISC-V: Add more test cases for vwmulsu.vv (*)
93ff238... RISC-V: Add test cases for vwmulsu.vv reg overlap (*)
2a696e2... RISC-V: Allow RVV register overlap for vwmulsu.vv (*)
0aca143... [PATCH 1/2] alpha: add a g++ testsuite directory (*)
fcb6dca... Daily bump. (*)
c1377cb... Revert "OpenMP/OpenACC tests. vs C++26" (*)
8f43cf5... C++: Handle OpenMP/OpenACC array sections [: / :] with C++2 (*)
49d761a... XFAIL default_format_2.f90 and default_format_denormal_2.f9 (*)
869a3e3... Skip gfortran.dg/PR100914.f90 on hppa*-*-hpux* (*)
33b48f3... testsuite, aarch64: Mark tests as needing ifunc support. (*)
08ede4f... c++/objective-c++; Do not claim feature(modules), it is cla (*)
c109d79... AVR: Add 16-bit saturated fixed-point divisions. (*)
898cd93... AVR: Add [un]signed sat accum divisions. (*)
e6cb892... libga68: do not record the source directory in generated so (*)
52ec176... libga68: honour a preset A68FLAGS (*)
4288735... Cleanup vectorizable_conversion (*)
6641de4... aarch64: Add SVE AES2 ACLE builtins (*)
28f2250... Simplify vect_get_vec_defs API (*)
9baaca2... tree-optimization/126650 - get_inner_reference_aff and bitf (*)
3f337c3... contrib: handle @option as indicating command to @table (*)
141edd0... fold-const, match.pd: Improve ptr_difference_const optimiza (*)
18550a0... Add FP8 to FP6 and vice-versa converts. (*)
617944a... Add FP8 to FP4 and vice-versa converts. (*)
1782fdf... Add FP8 to FP32 converts. (*)
b07ea1a... Add FP32 to FP8 Biased converts. (*)
50e5bb1... Add FP32 to FP8 Single-Source RTO converts. (*)
9ab9159... Add ISA support for AVX10_V2_AUX and FP32 to FP8 single-sou (*)
36990bb... tree-optimization: Recognize add/sub absolute-value idiom [ (*)
d90aac0... libstdc++: Support any generator (up to 64bit) in generate_ (*)
298071e... expand: Split divisions with near-power-of-two divisors [PR (*)
8f60387... statistics: Fix destruction ordering issues with mem_alloc_ (*)
6062380... statistics: Fix --enable-gather-detailed-mem-stats for PCH (*)
19fdf88... RISC-V: Add more test cases for vwsub/vwsubu/vwmul/vwmulu.v (*)
ec2023e... RISC-V: Add test cases for vwmulu.vv reg overlap (*)
c55a61e... RISC-V: Add test cases for vwmul.vv reg overlap (*)
41b68b7... RISC-V: Add test cases for vwsubu.vv reg overlap (*)
44e0270... RISC-V: Add test cases for vwsub.vv reg overlap (*)
8264fa7... Daily bump. (*)
7cdbbbd... RISC-V: Fix single-step expansion [PR126550]. (*)
d6073a2... PR tree-optimization/126242: Check range is defined to avoi (*)
b5b0203... testsuite: Fix up gcc.dg/pr126464.c test [PR126464] (*)
17d0df5... testsuite: Fix up gcc.dg/torture/bitint-100.c test [PR12494 (*)
bc1d30b... cobol: Unbreak bootstrap (*)
54c3bdc... Run the bootstrap object comparison in parallel (*)
1a75191... phiopt: Add some TARGET_MEM_REF support to factoring of loa (*)
8642ff2... Revert "forwprop, widening_mul: Fold longhand wide-multiply (*)
3cc9f5e... [PATCH] MAINTAINERS: Add myself to DCO section (*)
f1ea3d5... forwprop, widening_mul: Fold longhand wide-multiply idioms (*)
1c71996... match: fold two comparisons of a masked value (*)
987e387... vect: when REALPART/IMAGPART also check their def stmts [PR (*)
f877362... vect: convert do-loop edges properly for LOOP_VINFO_EARLY_B (*)
c3ceac8... vect: simplify is_linear_load_p using vec_perm_builder and (*)
30b4b8f... AArch64: block COMPLEX_MUL when honoring signed zeros [PR12 (*)
3565f0b... vect: try all 8 multiplication orderings for complex patter (*)
fdfe157... middle-end: fix condition on multiple negate pattern [PR126 (*)
9df54ce... aarch64: Replace `UNSPEC_NONE` with optional arguments wher (*)
70859b5... aarch64: use `unspec` type for unspec codes (*)
61c13bd... aarch64: Use shifts in `aarch64_type_qualifiers` enum (*)
58e6cb5... aarch64: Make `VECTOR_TYPE_none` an enum member (*)
8ce6c6c... aarch64: Reformat array initializers (*)
291a1a7... aarch64: Use variadic arguments (*)
c4726f9... aarch64: Define `DEF_SVE_TYPE_SUFFIX` in terms of `DEF_SVE_ (*)
7cb2104... aarch64: Document `DEF_*` macros (*)
57850fb... aarch64: Rename `ENTRY` to `DEF_SIMD_TYPE` (*)
504b476... vect: move check for safe speculative reads for inbound acc (*)
91dda50... [PATCH v5] RISC-V: Fix riscv_subword_address for big-endian (*)
8cd5fa5... contrib: Allow overriding download_prerequisites base URL (*)
097d4a9... [RISC-V][PR target/108031] Expose address computations for (*)
d782390... arm: Thumb2 reg preferencing for vfp variant of movsi [PR12 (*)
2354f26... arm: handle neon vec_dup from select of 128-bit vector (*)
1e5aaad... [frange] Convert float_widen_lhs_range to sub-ranges. (*)
dd4a1a6... [frange] Factor float_widen_bound out of float_widen_lhs_ra (*)
672923a... analyzer: support exception subclass matching [PR analyzer/ (*)
a49c114... widening_mul: Fix up ICE in maybe_optimize_guarding_check [ (*)
5e90879... phiopt: Fix up spaceship_replacement [PR126564] (*)
217df27... range-op-float: Remove inappropriate frange_drop_infs call (*)
c62176c... aarch64: Add missing CC clobber to max/min-of-add/sub patte (*)
e5912e7... sched-deps: record barriers once instead of per register (*)
789d24c... sched-deps: reuse reg_last arrays across regions (*)
ce720fc... sched-deps: release reg_last lists outside reg_last_in_use (*)
10a4ba5... sched-deps: clear dependency caches before freeing them (*)
b06b1ea... x86: Check DECL_INCOMING_RTL for argument passing check (*)
2db2cf6... RISC-V: Avoid unused frame-pointer references in stack ties (*)
372d44c... [PATCH] match: Simplify `(A | C) == A` to `(A & C) != 0` wh (*)
a1a07ce... Daily bump. (*)
c483e3d... Update gcc zh_CN.po (*)
7ca55e0... c++: Add missing "to" in reflection diagnostic (*)
4569067... c++: early DMI and constructor default arg [PR126606] (*)
8fb57ed... c++/reflection: ICE with &template [:members_of():] [PR1247 (*)
1e8ce63... Update cpplib pt_BR.po (*)
78b03e2... c++/reflection: ^^ rejects pack-index-specifier [PR126546] (*)
366ebd4... cobol: Ignore comments in strings. (*)
5387cfd... cobol: Allow ASSIGN OTHER under dialect ibm. (*)
86b7458... fortran: [PR118793] Additional expanded namelist read diagn (*)
011aa88... [committed] Fix recent msp430-elf regressions (*)
6a2eb23... cobol: Remove TITLE token. (*)
8239d93... match: Combine four simplify into one for. [PR63387] (*)
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