https://gcc.gnu.org/g:a41481d8f6f4fea37965b9bb62b200bfd14ffe8c

commit r17-2379-ga41481d8f6f4fea37965b9bb62b200bfd14ffe8c
Author: Pan Li <[email protected]>
Date:   Sat Jul 11 22:36:07 2026 +0800

    RISC-V: Adjust the scan asm for v[sz]ext.vf2 for v[123]
    
    The previous match v1 may match the v12 as well, therefore
    add the non-num boundary.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m1.c:
            Add non-number boundary for reg num check.
            * gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m2.c:
            Ditto.
            * gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf2.c:
            Ditto.
            * gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf4.c:
            Ditto.
            * gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-m1.c:
            Ditto.
            * gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-mf2.c:
            Ditto.
            * gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m1.c:
            Ditto.
            * gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m2.c:
            Ditto.
            * gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf2.c:
            Ditto.
            * gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf4.c:
            Ditto.
            * gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf8.c:
            Ditto.
    
    Signed-off-by: Pan Li <[email protected]>

Diff:
---
 .../gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m1.c     | 4 ++--
 .../gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m2.c     | 2 +-
 .../gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf2.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf4.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-m1.c     | 4 ++--
 .../gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-mf2.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m1.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m2.c      | 2 +-
 .../gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf2.c     | 4 ++--
 .../gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf4.c     | 4 ++--
 .../gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf8.c     | 4 ++--
 11 files changed, 20 insertions(+), 20 deletions(-)

diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m1.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m1.c
index 63e395bac8de..dcfcfa804d9f 100644
--- 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m1.c
+++ 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m1.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vzext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-times {vzext\.vf2\s+v0,v1} 1 } } */
-/* { dg-final { scan-assembler-times {vzext\.vf2\s+v2,v3} 1 } } */
+/* { dg-final { scan-assembler-times {vzext\.vf2\s+v0,v1([^0-9]|$)} 1 } } */
+/* { dg-final { scan-assembler-times {vzext\.vf2\s+v2,v3([^0-9]|$)} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m2.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m2.c
index 907d42a16a8a..0e9331cfe503 100644
--- 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m2.c
+++ 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-m2.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vzext_vf,
   LOOP_UNARY_BODY_X8)
 
-/* { dg-final { scan-assembler-times {vzext\.vf2\s+v0,v2} 1 } } */
+/* { dg-final { scan-assembler-times {vzext\.vf2\s+v0,v2([^0-9]|$)} 1 } } */
 /* { dg-final { scan-assembler-times {vzext\.vf2\s+v4,v6} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf2.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf2.c
index 5f6789bb1df3..dc7b8bfd6e0d 100644
--- 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf2.c
+++ 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf2.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vzext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v8,v9} } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf4.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf4.c
index 245fc3c85e44..b3cfcc2e5230 100644
--- 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf4.c
+++ 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u16-mf4.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vzext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v8,v9} } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-m1.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-m1.c
index db3143e35fcf..c4d2ca535c12 100644
--- 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-m1.c
+++ 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-m1.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vzext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-times {vzext\.vf2\s+v0,v1} 1 } } */
-/* { dg-final { scan-assembler-times {vzext\.vf2\s+v2,v3} 1 } } */
+/* { dg-final { scan-assembler-times {vzext\.vf2\s+v0,v1([^0-9]|$)} 1 } } */
+/* { dg-final { scan-assembler-times {vzext\.vf2\s+v2,v3([^0-9]|$)} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-mf2.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-mf2.c
index e467ee3264f3..7b963c748d23 100644
--- 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-mf2.c
+++ 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u32-mf2.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vzext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v8,v9} } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m1.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m1.c
index b72b9e2ffe71..7a63bdf898f0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m1.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m1.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vzext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-times {vzext\.vf2\s+v0,v1} 1 } } */
-/* { dg-final { scan-assembler-times {vzext\.vf2\s+v2,v3} 1 } } */
+/* { dg-final { scan-assembler-times {vzext\.vf2\s+v0,v1([^0-9]|$)} 1 } } */
+/* { dg-final { scan-assembler-times {vzext\.vf2\s+v2,v3([^0-9]|$)} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m2.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m2.c
index 767caebcf945..c04c88bc9fd5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m2.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-m2.c
@@ -13,5 +13,5 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vzext_vf,
   LOOP_UNARY_BODY_X8)
 
-/* { dg-final { scan-assembler-times {vzext\.vf2\s+v0,v2} 1 } } */
+/* { dg-final { scan-assembler-times {vzext\.vf2\s+v0,v2([^0-9]|$)} 1 } } */
 /* { dg-final { scan-assembler-times {vzext\.vf2\s+v4,v6} 1 } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf2.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf2.c
index 4a61f2c433a5..0465b31f15e8 100644
--- 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf2.c
+++ 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf2.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vzext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v8,v9} } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf4.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf4.c
index 2f75f3f906a7..a8a1dc958995 100644
--- 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf4.c
+++ 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf4.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vzext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v8,v9} } } */
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf8.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf8.c
index b248e14a6413..819942b74dae 100644
--- 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf8.c
+++ 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vzext_vf2-u8-mf8.c
@@ -13,8 +13,8 @@ DEF_GROUP_OVERLAP_UNARY_0(
   vzext_vf,
   LOOP_UNARY_BODY_X16)
 
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1} } } */
-/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v0,v1([^0-9]|$)} } } */
+/* { dg-final { scan-assembler-not {vzext\.vf2\s+v2,v3([^0-9]|$)} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v4,v5} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v6,v7} } } */
 /* { dg-final { scan-assembler-not {vzext\.vf2\s+v8,v9} } } */

Reply via email to