https://gcc.gnu.org/g:d338c42d76fa7ddec361fc344bf0c6add63c306b
commit r17-2283-gd338c42d76fa7ddec361fc344bf0c6add63c306b Author: Andrew Stubbs <[email protected]> Date: Thu Jul 9 16:27:54 2026 +0000 amdgcn: Testsuite cond_fmaxnm fixups These testcases had a typo that means they scan for SFmode twice, and DFmode never. They were also incompatible with the pattern names in my address vector patches (not yet committed). This patch fixes both issues. gcc/testsuite/ChangeLog: * gcc.target/gcn/cond_fmaxnm_3.c: Fix assembler scan patterns. * gcc.target/gcn/cond_fmaxnm_4.c: Fix assembler scan patterns. * gcc.target/gcn/cond_fminnm_3.c: Fix assembler scan patterns. * gcc.target/gcn/cond_fminnm_4.c: Fix assembler scan patterns. Diff: --- gcc/testsuite/gcc.target/gcn/cond_fmaxnm_3.c | 8 ++++---- gcc/testsuite/gcc.target/gcn/cond_fmaxnm_4.c | 8 ++++---- gcc/testsuite/gcc.target/gcn/cond_fminnm_3.c | 8 ++++---- gcc/testsuite/gcc.target/gcn/cond_fminnm_4.c | 8 ++++---- 4 files changed, 16 insertions(+), 16 deletions(-) diff --git a/gcc/testsuite/gcc.target/gcn/cond_fmaxnm_3.c b/gcc/testsuite/gcc.target/gcn/cond_fmaxnm_3.c index 5da33ac27267..0f1fcfbb149f 100644 --- a/gcc/testsuite/gcc.target/gcn/cond_fmaxnm_3.c +++ b/gcc/testsuite/gcc.target/gcn/cond_fmaxnm_3.c @@ -30,8 +30,8 @@ TEST_ALL (DEF_LOOP) /* { dg-final { scan-assembler-times {smaxv64sf3} 3 } } */ -/* { dg-final { scan-assembler-times {movv64sf_exec} 3 } } */ -/* { dg-final { scan-assembler-times {smaxv64sf3} 3 } } */ -/* { dg-final { scan-assembler-times {movv64df_exec} 3 } } */ +/* { dg-final { scan-assembler-times {v_cndmask[^\n]*movv64sf} 3 } } */ +/* { dg-final { scan-assembler-times {smaxv64df3} 3 } } */ +/* { dg-final { scan-assembler-times {v_mov[^\n]*movv64df[^\n]*exec} 3 } } */ -/* { dg-final { scan-assembler-not {\tv_writelane_b32\tv[0-9]+, vcc_..} } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not {\tv_writelane_b32\tv[0-9]+, vcc_..} } } */ diff --git a/gcc/testsuite/gcc.target/gcn/cond_fmaxnm_4.c b/gcc/testsuite/gcc.target/gcn/cond_fmaxnm_4.c index 263db35dd499..7885808bca3d 100644 --- a/gcc/testsuite/gcc.target/gcn/cond_fmaxnm_4.c +++ b/gcc/testsuite/gcc.target/gcn/cond_fmaxnm_4.c @@ -30,8 +30,8 @@ TEST_ALL (DEF_LOOP) /* { dg-final { scan-assembler-times {smaxv64sf3} 3 } } */ -/* { dg-final { scan-assembler-times {movv64sf_exec} 3 } } */ -/* { dg-final { scan-assembler-times {smaxv64sf3} 3 } } */ -/* { dg-final { scan-assembler-times {movv64df_exec} 3 } } */ +/* { dg-final { scan-assembler-times {v_cndmask[^\n]*movv64sf} 3 } } */ +/* { dg-final { scan-assembler-times {smaxv64df3} 3 } } */ +/* { dg-final { scan-assembler-times {v_mov[^\n]*movv64df[^\n]*exec} 3 } } */ -/* { dg-final { scan-assembler-not {\tv_writelane_b32\tv[0-9]+, vcc_..} } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not {\tv_writelane_b32\tv[0-9]+, vcc_..} } } */ diff --git a/gcc/testsuite/gcc.target/gcn/cond_fminnm_3.c b/gcc/testsuite/gcc.target/gcn/cond_fminnm_3.c index 59bbc5610ced..45b63c088147 100644 --- a/gcc/testsuite/gcc.target/gcn/cond_fminnm_3.c +++ b/gcc/testsuite/gcc.target/gcn/cond_fminnm_3.c @@ -7,8 +7,8 @@ #include "cond_fmaxnm_3.c" /* { dg-final { scan-assembler-times {sminv64sf3} 3 } } */ -/* { dg-final { scan-assembler-times {movv64sf_exec} 3 } } */ -/* { dg-final { scan-assembler-times {sminv64sf3} 3 } } */ -/* { dg-final { scan-assembler-times {movv64df_exec} 3 } } */ +/* { dg-final { scan-assembler-times {v_cndmask[^\n]*movv64sf} 3 } } */ +/* { dg-final { scan-assembler-times {sminv64df3} 3 } } */ +/* { dg-final { scan-assembler-times {v_mov[^\n]*movv64df[^\n]*exec} 3 } } */ -/* { dg-final { scan-assembler-not {\tv_writelane_b32\tv[0-9]+, vcc_..} } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not {\tv_writelane_b32\tv[0-9]+, vcc_..} } } */ diff --git a/gcc/testsuite/gcc.target/gcn/cond_fminnm_4.c b/gcc/testsuite/gcc.target/gcn/cond_fminnm_4.c index 07e6aae89197..bf41cc615a34 100644 --- a/gcc/testsuite/gcc.target/gcn/cond_fminnm_4.c +++ b/gcc/testsuite/gcc.target/gcn/cond_fminnm_4.c @@ -7,8 +7,8 @@ #include "cond_fmaxnm_4.c" /* { dg-final { scan-assembler-times {sminv64sf3} 3 } } */ -/* { dg-final { scan-assembler-times {movv64sf_exec} 3 } } */ -/* { dg-final { scan-assembler-times {sminv64sf3} 3 } } */ -/* { dg-final { scan-assembler-times {movv64df_exec} 3 } } */ +/* { dg-final { scan-assembler-times {v_cndmask[^\n]*movv64sf} 3 } } */ +/* { dg-final { scan-assembler-times {sminv64df3} 3 } } */ +/* { dg-final { scan-assembler-times {v_mov[^\n]*movv64df[^\n]*exec} 3 } } */ -/* { dg-final { scan-assembler-not {\tv_writelane_b32\tv[0-9]+, vcc_..} } } */ \ No newline at end of file +/* { dg-final { scan-assembler-not {\tv_writelane_b32\tv[0-9]+, vcc_..} } } */
