https://gcc.gnu.org/g:6cd75d8782ddd3acae811dc7a94bc2c6d92876af
commit 6cd75d8782ddd3acae811dc7a94bc2c6d92876af Author: Michael Meissner <[email protected]> Date: Thu Jul 2 20:05:58 2026 -0400 Fix -mregnames issue with dense math registers. Kishan Parmar <[email protected]> issued a patch that made me re-examine the code I had put out for dense math registers. This patch fixes two of these problems. The first problem is the output operand %A<n> was always printing out a number, even if -mregnames was used. I fixed this by using reg_names[..] for dense math registers. For power10/power11 accumulators that are overlaid on top of VSX registers, it just prints out the VSX register number divided by 4. The second problem is once %A<n> can print a register name instead of a number, the next problem is if you use -mregnames, GCC would put out %dmr<n> while the assembler wants %dm<n>. I fixed this to use the correct name. I have committed all of the patches in my backlog (dense math registers, other -mcpu=future instructions, random bug fixes, support for _Float16 and __bfloat16, and optimizations for vector logical operations on power10/power11) into the IBM vendor branch: vendors/ibm/gcc-17-future I have tested these patches on both big endian and little endian PowerPC servers, with no regressions. Can I check these patches into the trunk? 2026-07-02 Michael Meissner <[email protected]> gcc/ * config/rs6000/rs6000.cc (alt_reg_names): Use %dm<n> for dense math registers, not %dmr<n>. (print_operand): Add a comment for %A<n>, of why we can't emit %dm<n> since the assembler doesn't recognize %dm0 in this context. Diff: --- gcc/config/rs6000/rs6000.cc | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 07b6c690ad5f..c28894e4c09a 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -1259,7 +1259,7 @@ static const char alt_reg_names[][8] = /* vrsave vscr sfp */ "vrsave", "vscr", "sfp", /* dense math registers. */ - "%dmr0", "%dmr1", "%dmr2", "%dmr3", "%dmr4", "%dmr5", "%dmr6", "%dmr7", + "%dm0", "%dm1", "%dm2", "%dm3", "%dm4", "%dm5", "%dm6", "%dm7", }; #endif @@ -14476,6 +14476,10 @@ print_operand (FILE *file, rtx x, int code) accumulators overlapping with the FPR registers. */ if (!REG_P (x)) output_operand_lossage ("invalid %%A value"); + + /* We can't use reg_names[REGNO (x)] here because the assembler doesn't + recognize things list dmxvf64gerpp %dm6,%vs32,%vs40. We continue to + just put out a number 0..7. */ else if (TARGET_DENSE_MATH && DMF_REGNO_P (REGNO (x))) fprintf (file, "%d", REGNO (x) - FIRST_DMF_REGNO); else if (!FP_REGNO_P (REGNO (x)) || (REGNO (x) % 4) != 0)
