https://gcc.gnu.org/g:47b70db8779a0991b9370e571ab18901b2643a63
commit r17-2052-g47b70db8779a0991b9370e571ab18901b2643a63 Author: Jeevitha <[email protected]> Date: Wed Jul 1 05:11:42 2026 -0500 testsuite: Update Future VSX arithmetic tests The existing tests use inline asm to force operands into FPRs so that Future VSX arithmetic instructions are generated. Remove the operand forcing and let the tests check the compiler's default instruction selection. This allows the tests to catch any future changes in instruction selection caused by alternative reordering. 2026-07-01 Jeevitha Palanisamy <[email protected]> gcc/testsuite: * gcc.target/powerpc/vsx_arith_builtin-1.c: Remove inline asm that forces operands into FPRs. * gcc.target/powerpc/vsx_arith_builtin-2.c: Likewise. * gcc.target/powerpc/vsx_arith_vect_1.c: Likewiswe. Diff: --- gcc/testsuite/gcc.target/powerpc/vsx_arith_builtin-1.c | 10 ---------- gcc/testsuite/gcc.target/powerpc/vsx_arith_builtin-2.c | 10 ---------- gcc/testsuite/gcc.target/powerpc/vsx_arith_vect_1.c | 13 ------------- 3 files changed, 33 deletions(-) diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_arith_builtin-1.c b/gcc/testsuite/gcc.target/powerpc/vsx_arith_builtin-1.c index 701c0028f955..0421a71980ea 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_arith_builtin-1.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_arith_builtin-1.c @@ -10,56 +10,46 @@ typedef vector signed long long v2di_t; v4si_t int_add (v4si_t x, v4si_t y) { - /* force x & y into FPRs to prefer xvadduwm over vadduwm. */ - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_add (x, y); /* xvadduwm */ } v4si_t int_sub (v4si_t x, v4si_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_sub (x, y); /* xvsubuwm */ } v4si_t int_mul (v4si_t x, v4si_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_mul (x, y); /* xvmuluwm */ } v4si_t int_mulhi (v4si_t x, v4si_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_mulh (x, y); /* xvmulhsw */ } v8hi_t short_add (v8hi_t x, v8hi_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_add (x, y); /* xvadduhm */ } v8hi_t short_sub (v8hi_t x, v8hi_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_sub (x, y); /* xvsubuhm */ } v8hi_t short_mul (v8hi_t x, v8hi_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_mul (x, y); /* xvmuluhm */ } v8hi_t short_mulhi (v8hi_t x, v8hi_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_mulh (x, y); /* xvmulhsh */ } v2di_t longlong_mulhi (v2di_t x, v2di_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_mulh (x, y); /* vmulhsd */ } diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_arith_builtin-2.c b/gcc/testsuite/gcc.target/powerpc/vsx_arith_builtin-2.c index 38f857ff0fe5..c44304041b35 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_arith_builtin-2.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_arith_builtin-2.c @@ -10,56 +10,46 @@ typedef vector unsigned long long v2di_t; v4si_t uint_add (v4si_t x, v4si_t y) { - /* force x & y into FPRs to prefer xvadduwm over vadduwm. */ - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_add (x, y); /* xvadduwm */ } v4si_t uint_sub (v4si_t x, v4si_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_sub (x, y); /* xvsubuwm */ } v4si_t uint_mul (v4si_t x, v4si_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_mul (x, y); /* xvmuluwm */ } v4si_t uint_mulhi (v4si_t x, v4si_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_mulh (x, y); /* xvmulhuw */ } v8hi_t ushort_add (v8hi_t x, v8hi_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_add (x, y); /* xvadduhm */ } v8hi_t ushort_sub (v8hi_t x, v8hi_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_sub (x, y); /* xvsubuhm */ } v8hi_t ushort_mul (v8hi_t x, v8hi_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_mul (x, y); /* xvmuluhm */ } v8hi_t ushort_mulhi (v8hi_t x, v8hi_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_mulh (x, y); /* xvmulhuh */ } v2di_t ulonglong_mulhi (v2di_t x, v2di_t y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return vec_mulh (x, y); /* vmulhud */ } diff --git a/gcc/testsuite/gcc.target/powerpc/vsx_arith_vect_1.c b/gcc/testsuite/gcc.target/powerpc/vsx_arith_vect_1.c index 8596d562b0ff..fce087689f62 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx_arith_vect_1.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx_arith_vect_1.c @@ -11,74 +11,61 @@ typedef vector unsigned short vus; vsi int_add (vsi x, vsi y) { - /* force x & y into FPRs to prefer xvadduwm over vadduwm. */ - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x + y; /* xvadduwm */ } vsi int_sub (vsi x, vsi y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x - y; /* xvsubuwm */ } vsi int_mul (vsi x, vsi y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x * y; /* xvmuluwm */ } vui uint_add (vui x, vui y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x + y; /* xvadduwm */ } vui uint_sub (vui x, vui y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x - y; /* xvsubuwm */ } vui uint_mul (vui x, vui y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x * y; /* xvmuluwm */ } vss short_add (vss x, vss y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x + y; /* xvadduhm */ } vss short_sub (vss x, vss y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x - y; /* xvsubuhm */ } vss short_mul (vss x, vss y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x * y; /* xvmuluhm */ } vus ushort_add (vus x, vus y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x + y; /* xvadduhm */ } vus ushort_sub (vus x, vus y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x - y; /* xvsubuhm */ } vus ushort_mul (vus x, vus y) { - __asm__ (" # %x0,%x0" : "+f" (x), "+f" (y)); return x * y; /* xvmuluhm */ }
