https://gcc.gnu.org/g:b307fafcb93751cc9f80c9df2344c81411b825ec
commit b307fafcb93751cc9f80c9df2344c81411b825ec Author: Michael Meissner <[email protected]> Date: Thu Jun 25 15:43:06 2026 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.ibm | 31 ++++++++++++++++++++----------- 1 file changed, 20 insertions(+), 11 deletions(-) diff --git a/gcc/ChangeLog.ibm b/gcc/ChangeLog.ibm index bcfdcbf98912..0f3286d0cc0c 100644 --- a/gcc/ChangeLog.ibm +++ b/gcc/ChangeLog.ibm @@ -1,4 +1,4 @@ -==================== Branch ibm/gcc-17-future, sha patch #408 ==================== +==================== Branch ibm/gcc-17-future, sha patch #428 ==================== PR target/117251: Add tests @@ -23,7 +23,7 @@ gcc/testsuite/ * gcc.target/powerpc/p10-vector-fused-1.c: New test. * gcc.target/powerpc/p10-vector-fused-2.c: Likewise. -==================== Branch ibm/gcc-17-future, sha patch #407 ==================== +==================== Branch ibm/gcc-17-future, sha patch #427 ==================== PR target/117251: Improve vector fusion #7 @@ -82,7 +82,7 @@ gcc/ * config/rs6000/genfusion.pl (gen_logical_addsubf): Add support to generate vector/vector fusion if XXEVAL is supported. -==================== Branch ibm/gcc-17-future, sha patch #406 ==================== +==================== Branch ibm/gcc-17-future, sha patch #426 ==================== PR target/117251: Improve vector fusion #6 @@ -150,7 +150,7 @@ gcc/ * config/rs6000/genfusion.pl (gen_logical_addsubf): Add support to generate vector/vector fusion if XXEVAL is supported. -==================== Branch ibm/gcc-17-future, sha patch #405 ==================== +==================== Branch ibm/gcc-17-future, sha patch #425 ==================== PR target/117251: Improve vector fusion #5 @@ -218,7 +218,7 @@ gcc/ * config/rs6000/genfusion.pl (gen_logical_addsubf): Add support to generate vector/vector fusion if XXEVAL is supported. -==================== Branch ibm/gcc-17-future, sha patch #404 ==================== +==================== Branch ibm/gcc-17-future, sha patch #424 ==================== PR target/117251: Improve vector fusion #4 @@ -280,7 +280,7 @@ gcc/ * config/rs6000/genfusion.pl (gen_logical_addsubf): Add support to generate vector/vector fusion if XXEVAL is supported. -==================== Branch ibm/gcc-17-future, sha patch #403 ==================== +==================== Branch ibm/gcc-17-future, sha patch #423 ==================== PR target/117251: Improve vector fusion #3 @@ -348,7 +348,7 @@ gcc/ * config/rs6000/genfusion.pl (gen_logical_addsubf): Add support to generate vector/vector fusion if XXEVAL is supported. -==================== Branch ibm/gcc-17-future, sha patch #402 ==================== +==================== Branch ibm/gcc-17-future, sha patch #422 ==================== PR target/117251: Improve vector fusion #2 @@ -416,7 +416,7 @@ gcc/ * config/rs6000/genfusion.pl (gen_logical_addsubf): Add support to generate vector/vector fusion if XXEVAL is supported. -==================== Branch ibm/gcc-17-future, sha patch #401 ==================== +==================== Branch ibm/gcc-17-future, sha patch #421 ==================== PR target/117251: Improve vector fusion #1 @@ -469,11 +469,11 @@ gcc/ supported. * config/rs6000/predicates.md (vector_fusion_operand): New predicate. - * config/rs6000/rs6000.h (TARGET_XXEVAL): New macro. - * config/rs6000/rs6000.md (isa attribute): Add xxeval. + * config/rs6000/rs6000.md (isa attribute): Add p10p. (enabled attribute): Add support for XXEVAL support. + * config/rs6000/rs6000.h (TARGET_XXEVAL): New macro. -==================== Branch ibm/gcc-17-future, sha info ==================== +==================== Branch ibm/gcc-17-future, sha information ==================== PR target/117251: Add PowerPC XXEVAL support to speed up SHA3 calculations @@ -616,6 +616,15 @@ These patches add the following fusion patterns: xxlor => xxlnand xxlxor => xxlnand xxlandc => xxlnand xxland => xxlnand +==================== Branch ibm/gcc-17-future, sha patch #408 was reverted ==================== +==================== Branch ibm/gcc-17-future, sha patch #407 was reverted ==================== +==================== Branch ibm/gcc-17-future, sha patch #406 was reverted ==================== +==================== Branch ibm/gcc-17-future, sha patch #405 was reverted ==================== +==================== Branch ibm/gcc-17-future, sha patch #404 was reverted ==================== +==================== Branch ibm/gcc-17-future, sha patch #403 was reverted ==================== +==================== Branch ibm/gcc-17-future, sha patch #402 was reverted ==================== +==================== Branch ibm/gcc-17-future, sha patch #401 was reverted ==================== + ==================== Branch ibm/gcc-17-future, bugs patch #304 ==================== PR target/120681 - allow -mcmodel=large with PC relative addressing
