https://gcc.gnu.org/g:27fae973e0b6de9e32069f44d9b1f15ae6b6937e

commit r17-1468-g27fae973e0b6de9e32069f44d9b1f15ae6b6937e
Author: tobby.li <[email protected]>
Date:   Mon May 25 11:55:33 2026 +0800

    arm: cortex-m52 is not affected by CVE-2021-35465
    
    The Cortex-M52 processor does not have the VLLDM erratum described
    in CVE-2021-35465.  Remove the quirk_vlldm feature bit from the
    cortex-m52 CPU definition, so that -mfix-cmse-cve-2021-35465 is no
    longer enabled by default when compiling for this CPU.
    
    Also correct a typo in the documentation where the CVE number was
    incorrectly written as CVE-2021-365465.
    
    gcc/ChangeLog:
            * config/arm/arm-cpus.in (cortex-m52): Remove quirk_vlldm.
            * doc/invoke.texi: Remove cortex-m52 from the list of CPUs that
            enable -mfix-cmse-cve-2021-35465 by default.  Fix typo in CVE
            number (CVE-2021-365465 -> CVE-2021-35465).
    
    Signed-off-by: Tobby Li <[email protected]>

Diff:
---
 gcc/config/arm/arm-cpus.in | 2 +-
 gcc/doc/invoke.texi        | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index 16b68fc7c2fc..63f684012b6b 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -1642,7 +1642,7 @@ begin cpu cortex-m52
  option cdecp5 add cdecp5
  option cdecp6 add cdecp6
  option cdecp7 add cdecp7
- isa quirk_no_asmcpu quirk_vlldm
+ isa quirk_no_asmcpu
  costs v7m
 end cpu cortex-m52
 
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 186ed95db949..17e10b4b1b42 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -24166,9 +24166,9 @@ Development Tools Engineering Specification", which can 
be found on
 @opindex mno-fix-cmse-cve-2021-35465
 @item -mfix-cmse-cve-2021-35465
 Mitigate against a potential security issue with the @code{VLLDM} instruction
-in some M-profile devices when using CMSE (CVE-2021-365465).  This option is
+in some M-profile devices when using CMSE (CVE-2021-35465).  This option is
 enabled by default when the option @option{-mcpu=} is used with
-@code{cortex-m33}, @code{cortex-m35p}, @code{cortex-m52}, @code{cortex-m55},
+@code{cortex-m33}, @code{cortex-m35p}, @code{cortex-m55},
 @code{cortex-m85} or @code{star-mc1}. The option 
@option{-mno-fix-cmse-cve-2021-35465}
 can be used to disable the mitigation.

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