https://gcc.gnu.org/g:941df4bc7ac83574374a3623ac11b8685c2282cb
commit r16-5898-g941df4bc7ac83574374a3623ac11b8685c2282cb Author: Richard Biener <[email protected]> Date: Fri Dec 5 09:04:02 2025 +0100 Make gcc.dg/vect/vect-simd-clone-24.c more robust When -march=cascadelake is added we get 256bit vectorization by default but there's no OMP SIMD ABI for this case with inbranch. So add -mprefer-vector-width=512 to the testcase. PR tree-optimization/122776 * gcc.dg/vect/vect-simd-clone-24.c: Add -mprefer-vector-width=512. Diff: --- gcc/testsuite/gcc.dg/vect/vect-simd-clone-24.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-24.c b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-24.c index 35459d5d5b9e..5281dfa0a02c 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-simd-clone-24.c +++ b/gcc/testsuite/gcc.dg/vect/vect-simd-clone-24.c @@ -2,7 +2,7 @@ /* { dg-skip-if "" { *-*-* } { "-flto" } { "" } } */ /* { dg-require-effective-target vect_simd_clones } */ /* { dg-additional-options "-fopenmp-simd --param vect-partial-vector-usage=1 -fdump-tree-dce6 -w" } */ -/* { dg-additional-options "-mavx512f" { target avx512f } } */ +/* { dg-additional-options "-mavx512f -mprefer-vector-width=512" { target avx512f } } */ #pragma omp declare simd simdlen(16) int __attribute__((const)) baz (int x);
