https://gcc.gnu.org/g:859c3ce1437220353069efc5d83e6858dee80d1c
commit r16-5287-g859c3ce1437220353069efc5d83e6858dee80d1c Author: Christophe Lyon <[email protected]> Date: Fri Sep 19 13:11:29 2025 +0000 arm: [MVE intrinsics] rework sqrshrl sqrshrl_sat48 Implement sqrshrl and sqrshrl_sat48 using the new MVE builtins framework. gcc/ChangeLog: * config/arm/arm-mve-builtins-base.cc (enum which_scalar_shift): Add ss_SQRSHRL, ss_SQRSHRL_SAT48. (mve_function_scalar_shift): Add support for ss_SQRSHRL, ss_SQRSHRL_SAT48. (sqrshrl, sqrshrl_sat48): New. * config/arm/arm-mve-builtins-base.def (sqrshrl, sqrshrl_sat48): New. * config/arm/arm-mve-builtins-base.h (sqrshrl, sqrshrl_sat48): New. * config/arm/arm_mve.h (sqrshrl): Delete. (sqrshrl_sat48): Delete. (__arm_sqrshrl): Delete. (__arm_sqrshrl_sat48): Delete. * config/arm/mve.md (mve_sqrshrl_sat<supf>_di): Add '@' prefix. Diff: --- gcc/config/arm/arm-mve-builtins-base.cc | 12 ++++++++++++ gcc/config/arm/arm-mve-builtins-base.def | 2 ++ gcc/config/arm/arm-mve-builtins-base.h | 2 ++ gcc/config/arm/arm_mve.h | 16 ---------------- gcc/config/arm/mve.md | 2 +- 5 files changed, 17 insertions(+), 17 deletions(-) diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc index 3a450f11468d..d2989044dd38 100644 --- a/gcc/config/arm/arm-mve-builtins-base.cc +++ b/gcc/config/arm/arm-mve-builtins-base.cc @@ -1172,6 +1172,8 @@ public: enum which_scalar_shift { ss_ASRL, ss_LSLL, + ss_SQRSHRL, + ss_SQRSHRL_SAT48, ss_UQRSHLL, ss_UQRSHLL_SAT48, }; @@ -1203,6 +1205,14 @@ public: code = CODE_FOR_mve_lsll; break; + case ss_SQRSHRL: + code = code_for_mve_sqrshrl_sat_di (SQRSHRL_64); + break; + + case ss_SQRSHRL_SAT48: + code = code_for_mve_sqrshrl_sat_di (SQRSHRL_48); + break; + case ss_UQRSHLL: code = code_for_mve_uqrshll_sat_di (UQRSHLL_64); break; @@ -1407,6 +1417,8 @@ namespace arm_mve { FUNCTION (asrl, mve_function_scalar_shift, (ss_ASRL)) FUNCTION (lsll, mve_function_scalar_shift, (ss_LSLL)) +FUNCTION (sqrshrl, mve_function_scalar_shift, (ss_SQRSHRL)) +FUNCTION (sqrshrl_sat48, mve_function_scalar_shift, (ss_SQRSHRL_SAT48)) FUNCTION (uqrshll, mve_function_scalar_shift, (ss_UQRSHLL)) FUNCTION (uqrshll_sat48, mve_function_scalar_shift, (ss_UQRSHLL_SAT48)) FUNCTION_PRED_P_S_U (vabavq, VABAVQ) diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def index 84a77252b855..fdeb7411e757 100644 --- a/gcc/config/arm/arm-mve-builtins-base.def +++ b/gcc/config/arm/arm-mve-builtins-base.def @@ -20,6 +20,8 @@ #define REQUIRES_FLOAT false DEF_MVE_FUNCTION (asrl, scalar_s64_shift, none, none) DEF_MVE_FUNCTION (lsll, scalar_u64_shift, none, none) +DEF_MVE_FUNCTION (sqrshrl, scalar_s64_shift, none, none) +DEF_MVE_FUNCTION (sqrshrl_sat48, scalar_s64_shift, none, none) DEF_MVE_FUNCTION (uqrshll, scalar_u64_shift, none, none) DEF_MVE_FUNCTION (uqrshll_sat48, scalar_u64_shift, none, none) DEF_MVE_FUNCTION (vabavq, binary_acca_int32, all_integer, p_or_none) diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h index 5b8cb6e95a61..dfec21936724 100644 --- a/gcc/config/arm/arm-mve-builtins-base.h +++ b/gcc/config/arm/arm-mve-builtins-base.h @@ -25,6 +25,8 @@ namespace functions { extern const function_base *const asrl; extern const function_base *const lsll; +extern const function_base *const sqrshrl; +extern const function_base *const sqrshrl_sat48; extern const function_base *const uqrshll; extern const function_base *const uqrshll_sat48; extern const function_base *const vabavq; diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h index 2f43fd72a2bb..5a12d982c50a 100644 --- a/gcc/config/arm/arm_mve.h +++ b/gcc/config/arm/arm_mve.h @@ -81,8 +81,6 @@ #define vgetq_lane_u32(__a, __idx) __arm_vgetq_lane_u32(__a, __idx) #define vgetq_lane_u64(__a, __idx) __arm_vgetq_lane_u64(__a, __idx) #define sqrshr(__p0, __p1) __arm_sqrshr(__p0, __p1) -#define sqrshrl(__p0, __p1) __arm_sqrshrl(__p0, __p1) -#define sqrshrl_sat48(__p0, __p1) __arm_sqrshrl_sat48(__p0, __p1) #define sqshl(__p0, __p1) __arm_sqshl(__p0, __p1) #define sqshll(__p0, __p1) __arm_sqshll(__p0, __p1) #define srshr(__p0, __p1) __arm_srshr(__p0, __p1) @@ -242,20 +240,6 @@ __arm_vgetq_lane_u64 (uint64x2_t __a, const int __idx) return __a[__ARM_LANEQ(__a,__idx)]; } -__extension__ extern __inline int64_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_sqrshrl (int64_t value, int32_t shift) -{ - return __builtin_mve_sqrshrl_sat64_di (value, shift); -} - -__extension__ extern __inline int64_t -__attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) -__arm_sqrshrl_sat48 (int64_t value, int32_t shift) -{ - return __builtin_mve_sqrshrl_sat48_di (value, shift); -} - __extension__ extern __inline uint64_t __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) __arm_uqshll (uint64_t value, const int shift) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index 434194d51113..b416d0c873c9 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -4290,7 +4290,7 @@ ;; ;; [sqrshrl_di] ;; -(define_insn "mve_sqrshrl_sat<supf>_di" +(define_insn "@mve_sqrshrl_sat<supf>_di" [(set (match_operand:DI 0 "arm_low_register_operand" "=l") (unspec:DI [(match_operand:DI 1 "arm_low_register_operand" "0") (match_operand:SI 2 "register_operand" "r")]
