https://gcc.gnu.org/g:f9e6d9935b799ca746478aeed1ee31a74ccaae05

commit f9e6d9935b799ca746478aeed1ee31a74ccaae05
Author: Michael Meissner <[email protected]>
Date:   Tue Nov 11 11:48:27 2025 -0500

    Add -mcpu=future.
    
    2025-11-11  Michael Meissner  <[email protected]>
    
    gcc/
    
            * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
            _ARCH_FUTURE if -mcpu=future.
            * config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): New macros.
            (POWERPC_MASKS): Add OPTION_MASK_FUTURE.
            (future processor): Add -mcpu=future.
            * config/rs6000/rs6000-opts.h (PROCESSOR_FUTURE): Define as power11.
            * config/rs6000/rs6000.opt (-mfuture): New option.
    
    gcc/testsuite/
    
            * gcc.target/powerpc/future-1.c: New test.
            * gcc.target/powerpc/future-2.c: Likewise.

Diff:
---
 gcc/config/rs6000/rs6000-c.cc               |  2 ++
 gcc/config/rs6000/rs6000-cpus.def           |  6 ++++++
 gcc/config/rs6000/rs6000-opts.h             |  2 ++
 gcc/config/rs6000/rs6000-tables.opt         |  3 +++
 gcc/config/rs6000/rs6000.cc                 |  3 +++
 gcc/config/rs6000/rs6000.opt                |  5 +++++
 gcc/testsuite/gcc.target/powerpc/future-1.c | 13 +++++++++++++
 gcc/testsuite/gcc.target/powerpc/future-2.c | 24 ++++++++++++++++++++++++
 8 files changed, 58 insertions(+)

diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index d3b0a5668212..6757a2477ad1 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -437,6 +437,8 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT 
flags)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
   if ((flags & OPTION_MASK_POWER11) != 0)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
+  if ((flags & OPTION_MASK_FUTURE) != 0)
+    rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE");
   if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
     rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
   if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 4a1037616d7f..18547d82811e 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -83,6 +83,10 @@
 #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER                     \
                              | OPTION_MASK_POWER11)
 
+/* -mcpu=future flags.  */
+#define FUTURE_MASKS_SERVER    (POWER11_MASKS_SERVER                   \
+                                | OPTION_MASK_FUTURE)
+
 /* Flags that need to be turned off if -mno-vsx.  */
 #define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX    \
                                 | OPTION_MASK_FLOAT128_KEYWORD         \
@@ -119,6 +123,7 @@
                                 | OPTION_MASK_FLOAT128_HW              \
                                 | OPTION_MASK_FLOAT128_KEYWORD         \
                                 | OPTION_MASK_FPRND                    \
+                                | OPTION_MASK_FUTURE                   \
                                 | OPTION_MASK_POWER10                  \
                                 | OPTION_MASK_POWER11                  \
                                 | OPTION_MASK_P10_FUSION               \
@@ -255,3 +260,4 @@ RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, 
OPTION_MASK_PPC_GFXOPT
 RS6000_CPU ("powerpc64le", PROCESSOR_POWER8, MASK_POWERPC64
            | ISA_2_7_MASKS_SERVER | OPTION_MASK_HTM)
 RS6000_CPU ("rs64", PROCESSOR_RS64A, OPTION_MASK_PPC_GFXOPT | MASK_POWERPC64)
+RS6000_CPU ("future", PROCESSOR_FUTURE, MASK_POWERPC64 | FUTURE_MASKS_SERVER)
diff --git a/gcc/config/rs6000/rs6000-opts.h b/gcc/config/rs6000/rs6000-opts.h
index c31d2975f046..e13ba2ba5274 100644
--- a/gcc/config/rs6000/rs6000-opts.h
+++ b/gcc/config/rs6000/rs6000-opts.h
@@ -71,6 +71,8 @@ enum processor_type
    PROCESSOR_TITAN
 };
 
+/* For now, just use power11 as the base processor for -mcpu=future.  */
+#define PROCESSOR_FUTURE       PROCESSOR_POWER11
 
 /* Types of costly dependences.  */
 enum rs6000_dependence_cost
diff --git a/gcc/config/rs6000/rs6000-tables.opt 
b/gcc/config/rs6000/rs6000-tables.opt
index f5bbed5ea746..9e68c5a66e13 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -200,3 +200,6 @@ Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56)
 EnumValue
 Enum(rs6000_cpu_opt_value) String(rs64) Value(57)
 
+EnumValue
+Enum(rs6000_cpu_opt_value) String(future) Value(58)
+
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 1d5cd25c0f08..61623df146e0 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5913,6 +5913,8 @@ rs6000_machine_from_flags (void)
   flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL
             | OPTION_MASK_ALTIVEC);
 
+  if ((flags & (FUTURE_MASKS_SERVER & ~POWER11_MASKS_SERVER)) != 0)
+    return "future";
   if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
     return "power11";
   if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
@@ -24463,6 +24465,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128",                        OPTION_MASK_FLOAT128_KEYWORD,   false, 
true  },
   { "float128-hardware",       OPTION_MASK_FLOAT128_HW,        false, true  },
   { "fprnd",                   OPTION_MASK_FPRND,              false, true  },
+  { "future",                  OPTION_MASK_FUTURE,             false, false },
   { "power10",                 OPTION_MASK_POWER10,            false, true  },
   { "power11",                 OPTION_MASK_POWER11,            false, false },
   { "hard-dfp",                        OPTION_MASK_DFP,                false, 
true  },
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 88cf16ca581a..7c4f0375424c 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -634,6 +634,11 @@ mieee128-constant
 Target Var(TARGET_IEEE128_CONSTANT) Init(1) Save
 Generate (do not generate) code that uses the LXVKQ instruction.
 
+;; Potential future machine
+mfuture
+Target Undocumented Mask(FUTURE) Var(rs6000_isa_flags) Warn(Do not use 
%<-mfuture>, use %<-mcpu=future>)
+Generate (do not generate) potential future instructions.
+
 ; Documented parameters
 
 -param=rs6000-vect-unroll-limit=
diff --git a/gcc/testsuite/gcc.target/powerpc/future-1.c 
b/gcc/testsuite/gcc.target/powerpc/future-1.c
new file mode 100644
index 000000000000..7bd8e5ddbd00
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/future-1.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+/* Basic check to see if the compiler supports -mcpu=future and if it defines
+   _ARCH_FUTURE.  */
+
+#ifndef _ARCH_FUTURE
+#error "-mcpu=future is not supported"
+#endif
+
+void foo (void)
+{
+}
diff --git a/gcc/testsuite/gcc.target/powerpc/future-2.c 
b/gcc/testsuite/gcc.target/powerpc/future-2.c
new file mode 100644
index 000000000000..5552cefa3c2e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/future-2.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+/* Check if we can set the future target via a target attribute.  */
+
+__attribute__((__target__("cpu=power9")))
+void foo_p9 (void)
+{
+}
+
+__attribute__((__target__("cpu=power10")))
+void foo_p10 (void)
+{
+}
+
+__attribute__((__target__("cpu=power11")))
+void foo_p11 (void)
+{
+}
+
+__attribute__((__target__("cpu=future")))
+void foo_future (void)
+{
+}

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