https://gcc.gnu.org/g:ce6e9b8c55be68a681a448a2fb633bed8d17b0d8
commit ce6e9b8c55be68a681a448a2fb633bed8d17b0d8 Author: Jin Ma <[email protected]> Date: Fri May 16 15:27:13 2025 +0800 RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute more than once Reported-by: huangcunjian <[email protected]> gcc/ChangeLog: * config/riscv/riscv.cc (riscv_gpr_save_operation_p): Remove break and fixbug for elt index. (cherry picked from commit 55cfd1c8fa2ad2c5d91eadd14daa35f695779a2b) Diff: --- gcc/config/riscv/riscv.cc | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index fa460888ba92..183cdb9a1358 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -11590,11 +11590,10 @@ riscv_gpr_save_operation_p (rtx op) /* Two CLOBBER and USEs, must check the order. */ unsigned expect_code = i < 3 ? CLOBBER : USE; if (GET_CODE (elt) != expect_code - || !REG_P (XEXP (elt, 1)) - || (REGNO (XEXP (elt, 1)) != gpr_save_reg_order[i])) + || !REG_P (XEXP (elt, 0)) + || (REGNO (XEXP (elt, 0)) != gpr_save_reg_order[i])) return false; } - break; } return true; }
