https://gcc.gnu.org/g:abb22d046d3ee0b6a6ae2922bdd354e65096d8ca

commit r16-4944-gabb22d046d3ee0b6a6ae2922bdd354e65096d8ca
Author: Lulu Cheng <[email protected]>
Date:   Sun May 25 11:15:07 2025 +0800

    LoongArch: Optimize normal immediate data loading.
    
    Ensure that only one register is used when loading immediate values.
    The original immediate value load is handled through virtual
    registers, resulting in the following load operation
    (0x1234567890abcdef):
            lu12i.w $r4,-456004                     # 0xfffffffffff90abc
            or      $r12,$r0,$r0
            ori     $r4,$r4,3567
            lu32i.d $r12,0x45678
            lu32i.d $r4,0
            or      $r4,$r4,$r12
            lu52i.d $r4,$r4,0x123
    
    The optimized sequence is as follows:
            lu12i.w $r4,-456004                     # 0xfffffffffff90abc
            ori     $r4,$r4,3567
            lu32i.d $r4,0x45678
            lu52i.d $r4,$r4,0x123
    
    gcc/ChangeLog:
    
            * config/loongarch/loongarch.cc (loongarch_move_integer):
            No new virtual register is allocated during immediate load.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/loongarch/imm-load.c: Modify.

Diff:
---
 gcc/config/loongarch/loongarch.cc             | 9 ++-------
 gcc/testsuite/gcc.target/loongarch/imm-load.c | 2 +-
 2 files changed, 3 insertions(+), 8 deletions(-)

diff --git a/gcc/config/loongarch/loongarch.cc 
b/gcc/config/loongarch/loongarch.cc
index 1dce56e46fd1..c725d028d8c3 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -3439,13 +3439,8 @@ loongarch_move_integer (rtx temp, rtx dest, unsigned 
HOST_WIDE_INT value)
   x = GEN_INT (codes[0].value);
   for (i = 1; i < num_ops; i++)
     {
-      if (!can_create_pseudo_p ())
-       {
-         emit_insn (gen_rtx_SET (temp, x));
-         x = temp;
-       }
-      else
-       x = force_reg (mode, x);
+      emit_insn (gen_rtx_SET (temp, x));
+      x = temp;
 
       set_unique_reg_note (get_last_insn (), REG_EQUAL,
                           GEN_INT (codes[i-1].curr_value));
diff --git a/gcc/testsuite/gcc.target/loongarch/imm-load.c 
b/gcc/testsuite/gcc.target/loongarch/imm-load.c
index 33291fe89bdc..a125840d5072 100644
--- a/gcc/testsuite/gcc.target/loongarch/imm-load.c
+++ b/gcc/testsuite/gcc.target/loongarch/imm-load.c
@@ -7,5 +7,5 @@ test (void)
 {
   return 0x1234567890abcdef;
 }
-/* { dg-final { scan-rtl-dump-times "scanning new insn with uid" 6 "split1" } 
} */
+/* { dg-final { scan-rtl-dump-times "scanning new insn with uid" 4 "split1" } 
} */

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