https://gcc.gnu.org/g:656bde9a5c32f5d6b9f421d1f4424d4499769a86
commit 656bde9a5c32f5d6b9f421d1f4424d4499769a86 Author: Pan Li <[email protected]> Date: Tue Oct 14 10:33:08 2025 +0800 RISC-V: Fix incorrect op of vwaddu/vwsubu wx combine The vwaddu and vwsubu combine pattern should take plus/minus instead of any_widen_binop. This PATCH would like to fix it. The below test suites are passed for this patch series. * The rv64gcv fully regression test. gcc/ChangeLog: * config/riscv/autovec-opt.md: Take concrete op instead of any_widen_binop for vwaddu/vwsubu wx combine. Signed-off-by: Pan Li <[email protected]> (cherry picked from commit d58a8e37f04e727857391ff22f3924cb97f4d168) Diff: --- gcc/config/riscv/autovec-opt.md | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/config/riscv/autovec-opt.md b/gcc/config/riscv/autovec-opt.md index 3d6e0a19c8a5..d2705cf0fb92 100644 --- a/gcc/config/riscv/autovec-opt.md +++ b/gcc/config/riscv/autovec-opt.md @@ -1913,7 +1913,7 @@ (define_insn_and_split "*widen_waddu_wx_<mode>" [(set (match_operand:VWEXTI_D 0 "register_operand") - (any_widen_binop:VWEXTI_D + (plus:VWEXTI_D (vec_duplicate:VWEXTI_D (any_extend:<VEL> (match_operand:<VSUBEL> 2 "register_operand"))) @@ -1933,7 +1933,7 @@ (define_insn_and_split "*widen_wsubu_wx_<mode>" [(set (match_operand:VWEXTI_D 0 "register_operand") - (any_widen_binop:VWEXTI_D + (minus:VWEXTI_D (match_operand:VWEXTI_D 1 "register_operand") (vec_duplicate:VWEXTI_D (any_extend:<VEL>
