https://gcc.gnu.org/g:059eb26c0337cd201898217ccc2878ab5c69f5bb

commit r16-4357-g059eb26c0337cd201898217ccc2878ab5c69f5bb
Author: Francois-Xavier Coudert <[email protected]>
Date:   Thu Oct 9 10:11:38 2025 +0200

    aarch64, Darwin: Improve Apple M3 cores, add M4
    
    Complete the list of M3 cores (Ibiza, Palma and Lobos) and add the M4
    cores (Donan and two types of Brava).
    
    The values for chip IDs and the LITTLE.big variants have been taken from
    lists in the XNU sources (xnu/osfmk/arm/cpuid.h) in xnu-11417.101.15.
    
    gcc/ChangeLog:
    
            * config/aarch64/aarch64-cores.def (AARCH64_CORE): Improve Apple
            M3 and add Apple M4 cores.
            * config/aarch64/aarch64-tune.md: Regenerate.
            * doc/invoke.texi: Add apple-m4 core to the ones listed
            for arch and tune selections.

Diff:
---
 gcc/config/aarch64/aarch64-cores.def | 10 ++++++++--
 gcc/config/aarch64/aarch64-tune.md   |  2 +-
 gcc/doc/invoke.texi                  |  2 +-
 3 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-cores.def 
b/gcc/config/aarch64/aarch64-cores.def
index 6f11cc0983a6..baf8abfebd7d 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -176,7 +176,8 @@ AARCH64_CORE("cortex-r82ae", cortexr82ae, cortexa53, V8R, 
(), cortexa53, 0x41, 0
 /* Apple (A12 and M) cores.
    Known part numbers as listed in other public sources.
    Placeholders for schedulers, generic_armv8_a for costs.
-   A12 seems mostly 8.3, M1 is 8.5 without BTI, M2 and M3 are 8.6
+   A12 seems mostly 8.3, M1 is 8.5 without BTI, M2 and M3 are 8.6.
+   M4 is 9.2 but without SVE, so the closest match is 8.7.
    From measurements made so far the odd-number core IDs are performance.  */
 AARCH64_CORE("apple-a12", applea12, cortexa53, V8_3A,  (), generic_armv8_a, 
0x61, 0x12, -1)
 AARCH64_CORE("apple-m1", applem1_0, cortexa57, V8_5A,  (), generic_armv8_a, 
0x61, AARCH64_BIG_LITTLE (0x21, 0x20), -1)
@@ -187,7 +188,12 @@ AARCH64_CORE("apple-m2", applem2_0, cortexa57, V8_6A,  (), 
generic_armv8_a, 0x61
 AARCH64_CORE("apple-m2", applem2_1, cortexa57, V8_6A,  (), generic_armv8_a, 
0x61, AARCH64_BIG_LITTLE (0x33, 0x32), -1)
 AARCH64_CORE("apple-m2", applem2_2, cortexa57, V8_6A,  (), generic_armv8_a, 
0x61, AARCH64_BIG_LITTLE (0x35, 0x34), -1)
 AARCH64_CORE("apple-m2", applem2_3, cortexa57, V8_6A,  (), generic_armv8_a, 
0x61, AARCH64_BIG_LITTLE (0x39, 0x38), -1)
-AARCH64_CORE("apple-m3", applem3_0, cortexa57, V8_6A,  (), generic_armv8_a, 
0x61, AARCH64_BIG_LITTLE (0x49, 0x48), -1)
+AARCH64_CORE("apple-m3", applem3_0, cortexa57, V8_6A,  (), generic_armv8_a, 
0x61, AARCH64_BIG_LITTLE (0x43, 0x42), -1)
+AARCH64_CORE("apple-m3", applem3_1, cortexa57, V8_6A,  (), generic_armv8_a, 
0x61, AARCH64_BIG_LITTLE (0x45, 0x44), -1)
+AARCH64_CORE("apple-m3", applem3_2, cortexa57, V8_6A,  (), generic_armv8_a, 
0x61, AARCH64_BIG_LITTLE (0x49, 0x48), -1)
+AARCH64_CORE("apple-m4", applem4_0, cortexa57, V8_7A,  (), generic_armv8_a, 
0x61, AARCH64_BIG_LITTLE (0x53, 0x52), -1)
+AARCH64_CORE("apple-m4", applem4_1, cortexa57, V8_7A,  (), generic_armv8_a, 
0x61, AARCH64_BIG_LITTLE (0x55, 0x54), -1)
+AARCH64_CORE("apple-m4", applem4_2, cortexa57, V8_7A,  (), generic_armv8_a, 
0x61, AARCH64_BIG_LITTLE (0x59, 0x58), -1)
 
 /* Armv9.0-A Architecture Processors.  */
 
diff --git a/gcc/config/aarch64/aarch64-tune.md 
b/gcc/config/aarch64/aarch64-tune.md
index 40ff147d6f83..dc10f70265d2 100644
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@
 ;; -*- buffer-read-only: t -*-
 ;; Generated automatically by gentune.sh from aarch64-cores.def
 (define_attr "tune"
-       
"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88,thunderxt88p1,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,ampere1b,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,fujitsu_monaka,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,oryon1,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexr82ae,applea12,applem1_0,applem1_1,applem1_2,applem1_3,applem2_0,applem2_1,applem2_2,applem2_3,applem3_0,cortexa510,cortexa520,cortexa520ae,cortexa710,cortexa715,cortexa720,cortexa720ae,cortexa725,cortexx2,cortexx3,cortexx4,cortexx925,neoversen2,cobalt100,neoversen3,neoversev2
 
,grace,neoversev3,neoversev3ae,demeter,olympus,gb10,generic,generic_armv8_a,generic_armv9_a"
+       
"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88,thunderxt88p1,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,ampere1b,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,fujitsu_monaka,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,oryon1,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexr82ae,applea12,applem1_0,applem1_1,applem1_2,applem1_3,applem2_0,applem2_1,applem2_2,applem2_3,applem3_0,applem3_1,applem3_2,applem4_0,applem4_1,applem4_2,cortexa510,cortexa520,cortexa520ae,cortexa710,cortexa715,cortexa720,cortexa720ae,cortexa725,cortexx2,cortexx3,cortexx4,cor
 
texx925,neoversen2,cobalt100,neoversen3,neoversev2,grace,neoversev3,neoversev3ae,demeter,olympus,gb10,generic,generic_armv8_a,generic_armv9_a"
        (const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index faa49afad818..8559b7378fd0 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -22421,7 +22421,7 @@ performance of the code.  Permissible values for this 
option are:
 @samp{cortex-a520}, @samp{cortex-a520ae}, @samp{cortex-a710}, 
@samp{cortex-a715},
 @samp{cortex-a720}, @samp{cortex-a720ae}, @samp{ampere1}, @samp{ampere1a},
 @samp{ampere1b}, @samp{cobalt-100}, @samp{apple-m1}, @samp{apple-m2},
-@samp{apple-m3} and @samp{native}.
+@samp{apple-m3}, @samp{apple-m4} and @samp{native}.
 
 The values @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
 @samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53},

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