https://gcc.gnu.org/g:00340983fdc2e7e8b86d93abaa245851abe82365
commit 00340983fdc2e7e8b86d93abaa245851abe82365 Author: Michael Meissner <[email protected]> Date: Fri Sep 12 12:11:15 2025 -0400 Use xvcvdpsp instead of xscvdpspn. 2025-09-12 Michael Meissner <[email protected]> gcc/ * config/rs6000/rs6000.md (trunc<mode>bf2): Use xvcvdpsp instead of xscvdpspn. * config/rs6000/vsx.md (vsx_xvcvdpsp_<mode>): New insn. (vsx_xscvdpspn_sf): Delete. Diff: --- gcc/config/rs6000/rs6000.md | 7 ++----- gcc/config/rs6000/vsx.md | 18 ++++++++++-------- 2 files changed, 12 insertions(+), 13 deletions(-) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 4fa59ab54824..7862ad526f90 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -5920,7 +5920,7 @@ ;; Convert SFmode/DFmode to BFmode. ;; 2 instructions are generated: -;; XSCVDPSPN -- convert SFmode/DFmode scalar to V4SFmode +;; XVCVDPSPN -- convert SFmode/DFmode scalar to V4SFmode ;; XVCVSPBF16 -- convert V4SFmode to even V8BFmode (define_insn_and_split "trunc<mode>bf2" @@ -5940,10 +5940,7 @@ if (GET_CODE (op2) == SCRATCH) op2 = gen_reg_rtx (V4SFmode); - emit_insn (GET_MODE (op1) == SFmode - ? gen_vsx_xscvdpspn_sf (op2, op1) - : gen_vsx_xscvdpspn (op2, op1)); - + emit_insn (gen_vsx_xvcvdpsp_<mode> (op2, op1)); emit_insn (gen_vsx_xvcvspbf16_bf (op0, op2)); DONE; } diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 111457b8fe2e..7d98d9865d7b 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -2436,6 +2436,16 @@ "xvcvdpsp %x0,%x1" [(set_attr "type" "vecdouble")]) +;; Needed for converting SF/DFmode to BFmode +(define_insn "vsx_xvcvdpsp_<mode>" + [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa") + (unspec:V4SF [(match_operand:SFDF 1 "vsx_register_operand" "wa") + (const_int 0)] + UNSPEC_VSX_CVSPDP))] + "VECTOR_UNIT_VSX_P (V2DFmode)" + "xvcvdpsp %x0,%x1" + [(set_attr "type" "fp")]) + ;; xscvspdp, represent the scalar SF type as V4SF (define_insn "vsx_xscvspdp" [(set (match_operand:DF 0 "vsx_register_operand" "=wa") @@ -2511,14 +2521,6 @@ "xscvdpspn %x0,%x1" [(set_attr "type" "fp")]) -(define_insn "vsx_xscvdpspn_sf" - [(set (match_operand:V4SF 0 "vsx_register_operand" "=wa") - (unspec:V4SF [(match_operand:SF 1 "vsx_register_operand" "wa")] - UNSPEC_VSX_CVDPSPN))] - "TARGET_XSCVDPSPN" - "xscvdpspn %x0,%x1" - [(set_attr "type" "fp")]) - (define_insn "vsx_xscvspdpn" [(set (match_operand:DF 0 "vsx_register_operand" "=wa") (unspec:DF [(match_operand:V4SF 1 "vsx_register_operand" "wa")]
