[gcc r16-3279] AArch64: Use vectype from SLP node instead of stmt_info [PR121536]

[Tamar Christina via Gcc-cvs]

https://gcc.gnu.org/g:7d72cad143ff6933f2f90018c65d6c861c387e4d

commit r16-3279-g7d72cad143ff6933f2f90018c65d6c861c387e4d
Author: Tamar Christina <tamar.christ...@arm.com>
Date:   Tue Aug 19 10:18:04 2025 +0100

    AArch64: Use vectype from SLP node instead of stmt_info [PR121536]
    
    commit g:1786be14e94bf1a7806b9dc09186f021737f0227 stops storing in
    STMT_VINFO_VECTYPE the vectype of the current stmt being vectorized and 
instead
    requires the use of SLP_TREE_VECTYPE for everything but data-refs.
    
    This means that STMT_VINFO_VECTYPE (stmt_info) will always be NULL and so
    aarch64_bool_compound_p will never properly cost predicate AND operations
    anymore resulting in less vectorization.
    
    This patch changes it to use SLP_TREE_VECTYPE and pass the slp_node to
    aarch64_bool_compound_p.
    
    gcc/ChangeLog:
    
            PR target/121536
            * config/aarch64/aarch64.cc (aarch64_bool_compound_p): Use
            SLP_TREE_VECTYPE instead of STMT_VINFO_VECTYPE.
            (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Pass 
SLP
            node to aarch64_bool_compound_p.
    
    gcc/testsuite/ChangeLog:
    
            PR target/121536
            * g++.target/aarch64/sve/pr121536.cc: New test.

Diff:
---
 gcc/config/aarch64/aarch64.cc                    | 11 ++++++-----
 gcc/testsuite/g++.target/aarch64/sve/pr121536.cc | 14 ++++++++++++++
 2 files changed, 20 insertions(+), 5 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 83cd132a3e0e..fb8311b655d7 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -17378,13 +17378,14 @@ aarch64_multiply_add_p (vec_info *vinfo, 
stmt_vec_info stmt_info,
 
 static bool
 aarch64_bool_compound_p (vec_info *vinfo, stmt_vec_info stmt_info,
-                        unsigned int vec_flags)
+                        slp_tree node, unsigned int vec_flags)
 {
   gassign *assign = dyn_cast<gassign *> (stmt_info->stmt);
   if (!assign
+      || !node
       || gimple_assign_rhs_code (assign) != BIT_AND_EXPR
-      || !STMT_VINFO_VECTYPE (stmt_info)
-      || !VECTOR_BOOLEAN_TYPE_P (STMT_VINFO_VECTYPE (stmt_info)))
+      || !SLP_TREE_VECTYPE (node)
+      || !VECTOR_BOOLEAN_TYPE_P (SLP_TREE_VECTYPE (node)))
     return false;
 
   for (int i = 1; i < 3; ++i)
@@ -17723,7 +17724,7 @@ aarch64_adjust_stmt_cost (vec_info *vinfo, 
vect_cost_for_stmt kind,
 
          /* For vector boolean ANDs with a compare operand we just need
             one insn.  */
-         if (aarch64_bool_compound_p (vinfo, stmt_info, vec_flags))
+         if (aarch64_bool_compound_p (vinfo, stmt_info, node, vec_flags))
            return 0;
        }
 
@@ -17804,7 +17805,7 @@ aarch64_vector_costs::count_ops (unsigned int count, 
vect_cost_for_stmt kind,
 
       /* Assume that bool AND with compare operands will become a single
         operation.  */
-      if (aarch64_bool_compound_p (m_vinfo, stmt_info, m_vec_flags))
+      if (aarch64_bool_compound_p (m_vinfo, stmt_info, node, m_vec_flags))
        return;
     }
 
diff --git a/gcc/testsuite/g++.target/aarch64/sve/pr121536.cc 
b/gcc/testsuite/g++.target/aarch64/sve/pr121536.cc
new file mode 100644
index 000000000000..bd3c69b3801b
--- /dev/null
+++ b/gcc/testsuite/g++.target/aarch64/sve/pr121536.cc
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-fdump-tree-vect-all -std=c++14 -O3 
-mcpu=neoverse-v2  -msve-vector-bits=128" } */
+
+using a = long;
+using b = a;
+using c = double;
+b d;
+c e;
+void f() {
+  for (b g; g < d; ++g)
+    e += g;
+}
+
+/* { dg-final { scan-tree-dump "LOOP VECTORIZED" "vect" } } */