https://gcc.gnu.org/g:c4e96a094636b3c15b5e3bfde8673ec3b8172993
commit r15-10223-gc4e96a094636b3c15b5e3bfde8673ec3b8172993
Author: Lulu Cheng <chengl...@loongson.cn>
Date: Wed Aug 13 11:04:35 2025 +0800
LoongArch: Define hook TARGET_COMPUTE_PRESSURE_CLASSES[PR120476].
The rtx cost value defined by the target backend affects the
calculation of register pressure classes in the IRA, thus affecting
scheduling. This may cause program performance degradation.
For example, OpenSSL 3.5.1 SHA512 and SPEC CPU 2017 exchange_r.
This problem can be avoided by defining a set of register pressure
classes in the target backend instead of using the default IRA to
automatically calculate them.
gcc/ChangeLog:
PR target/120476
* config/loongarch/loongarch.cc
(loongarch_compute_pressure_classes): New function.
(TARGET_COMPUTE_PRESSURE_CLASSES): Define.
(cherry picked from commit d94178d9b3fb1cb869b90d6f061990eae75c770e)
Diff:
---
gcc/config/loongarch/loongarch.cc | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/gcc/config/loongarch/loongarch.cc
b/gcc/config/loongarch/loongarch.cc
index ac24c6d768fb..734a3cccc58a 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -11152,6 +11152,18 @@ loongarch_c_mode_for_suffix (char suffix)
return VOIDmode;
}
+/* Implement TARGET_COMPUTE_PRESSURE_CLASSES. */
+
+static int
+loongarch_compute_pressure_classes (reg_class *classes)
+{
+ int i = 0;
+ classes[i++] = GENERAL_REGS;
+ classes[i++] = FP_REGS;
+ classes[i++] = FCC_REGS;
+ return i;
+}
+
/* Initialize the GCC target structure. */
#undef TARGET_ASM_ALIGNED_HI_OP
#define TARGET_ASM_ALIGNED_HI_OP "\t.half\t"
@@ -11426,6 +11438,9 @@ loongarch_c_mode_for_suffix (char suffix)
#undef TARGET_C_MODE_FOR_SUFFIX
#define TARGET_C_MODE_FOR_SUFFIX loongarch_c_mode_for_suffix
+#undef TARGET_COMPUTE_PRESSURE_CLASSES
+#define TARGET_COMPUTE_PRESSURE_CLASSES loongarch_compute_pressure_classes
+
struct gcc_target targetm = TARGET_INITIALIZER;
#include "gt-loongarch.h"
