https://gcc.gnu.org/g:c534174d4ca2fb1d2260923d47fb81609bc56e4c

commit r16-1571-gc534174d4ca2fb1d2260923d47fb81609bc56e4c
Author: Kito Cheng <kito.ch...@sifive.com>
Date:   Tue Jun 17 13:01:01 2025 +0800

    RISC-V: Use riscv_2x_xlen_mode_p [NFC]
    
    Use riscv_v_ext_mode_p to check the mode size is 2x XLEN, instead of
    using "(GET_MODE_UNIT_SIZE (mode) == (UNITS_PER_WORD * 2))".
    
    gcc/ChangeLog:
    
            * config/riscv/riscv.cc (riscv_legitimize_move): Use
            riscv_2x_xlen_mode_p.
            (riscv_binary_cost): Ditto.
            (riscv_hard_regno_mode_ok): Ditto.

Diff:
---
 gcc/config/riscv/riscv.cc | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 7de12f41c113..5fa84e0466da 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3788,10 +3788,8 @@ riscv_legitimize_move (machine_mode mode, rtx dest, rtx 
src)
       return true;
     }
 
-  if (TARGET_ZILSD
-      && (GET_MODE_UNIT_SIZE (mode) == (UNITS_PER_WORD * 2))
-      && ((REG_P (dest) && MEM_P (src))
-         || (MEM_P (dest) && REG_P (src)))
+  if (TARGET_ZILSD && riscv_2x_xlen_mode_p (mode)
+      && ((REG_P (dest) && MEM_P (src)) || (MEM_P (dest) && REG_P (src)))
       && can_create_pseudo_p ())
     {
       rtx reg = REG_P (dest) ? dest : src;
@@ -3878,7 +3876,7 @@ static int
 riscv_binary_cost (rtx x, int single_insns, int double_insns)
 {
   if (!riscv_v_ext_mode_p (GET_MODE (x))
-      && GET_MODE_SIZE (GET_MODE (x)).to_constant () == UNITS_PER_WORD * 2)
+      && riscv_2x_xlen_mode_p (GET_MODE (x)))
     return COSTS_N_INSNS (double_insns);
   return COSTS_N_INSNS (single_insns);
 }
@@ -10015,9 +10013,7 @@ riscv_hard_regno_mode_ok (unsigned int regno, 
machine_mode mode)
        return false;
 
       /* Zilsd require load/store with even-odd reg pair.  */
-      if (TARGET_ZILSD
-         && (GET_MODE_UNIT_SIZE (mode) == (UNITS_PER_WORD * 2))
-         && ((regno % 2) != 0))
+      if (TARGET_ZILSD && riscv_2x_xlen_mode_p (mode) && ((regno % 2) != 0))
        return false;
 
       if (!GP_REG_P (regno + nregs - 1))

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