https://gcc.gnu.org/g:ad909d5c0ce7fcd0bcbacd0ee20c15bf479fd990
commit r16-1526-gad909d5c0ce7fcd0bcbacd0ee20c15bf479fd990
Author: Pan Li <pan2...@intel.com>
Date: Sun Jun 15 16:28:38 2025 +0800
RISC-V: Refine VX combine test case 0 to avoid code duplication
The case 0 for vx combine def functions are most the same across
the different test files. Thus, re-arrange them in one place to
avoid code duplication.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Leverage
helper macros to avoid code duplication.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add
signed and unsigned vx combine test macros.
Signed-off-by: Pan Li <pan2...@intel.com>
Diff:
---
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c | 12 +----------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c | 11 +---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h | 25 ++++++++++++++++++++++
25 files changed, 49 insertions(+), 252 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
index b070efdcbb20..e18a672704a2 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c
@@ -5,17 +5,7 @@
#define T int16_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
index 3b51ca7ab1b8..5feec251a4cf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c
@@ -5,17 +5,7 @@
#define T int32_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
index b5ee4577710a..2474684aaafc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c
@@ -5,17 +5,7 @@
#define T int64_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
index 7b0c89bf4f6f..6f06283140b8 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c
@@ -5,17 +5,7 @@
#define T int8_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
index 11848f8f8e1f..e06829d621d5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
@@ -5,16 +5,7 @@
#define T uint16_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
index b1e42ecb5dde..05fb829a87e0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
@@ -5,16 +5,7 @@
#define T uint32_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
index a007e30282fb..4681f36cd4b1 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c
@@ -5,16 +5,7 @@
#define T uint64_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
index 18a93e339a01..9b4404f1e9d3 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
@@ -5,16 +5,7 @@
#define T uint8_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub);
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
/* { dg-final { scan-assembler-times {vsub.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
index eaa49590bd07..6726e23e03d4 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c
@@ -5,17 +5,7 @@
#define T int16_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
index 5523256dfa57..8cf7ba980b4e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c
@@ -5,17 +5,7 @@
#define T int32_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
index 9eb1025c54c9..51514e85c0ed 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c
@@ -5,17 +5,7 @@
#define T int64_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
index 9a97112a7042..12d11ba90154 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c
@@ -5,17 +5,7 @@
#define T int8_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
index 5ef459431c1f..ec1b7d9792a6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
@@ -5,16 +5,7 @@
#define T uint16_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
index da24b823b584..40ef1072de8f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
@@ -5,16 +5,7 @@
#define T uint32_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
index 067cd1ab2fc2..abf04d155fe5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c
@@ -5,16 +5,7 @@
#define T uint64_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
index 477f56353a30..400fc3c47339 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
@@ -5,16 +5,7 @@
#define T uint8_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
index 5e0fe4178ac1..20319857896c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c
@@ -5,17 +5,7 @@
#define T int16_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
index 2b842dea1c64..462793ff4213 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c
@@ -5,17 +5,7 @@
#define T int32_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
index 9f981a5d9a85..65498e35371e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c
@@ -5,17 +5,7 @@
#define T int64_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
index a1d7cf4ea91a..908df5ea71a0 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c
@@ -5,17 +5,7 @@
#define T int8_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, *, mul)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_SIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
index 2ae9dd74c673..e6d5014d9efd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
@@ -5,16 +5,7 @@
#define T uint16_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
index c9420f924c49..45608622195a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
@@ -5,16 +5,7 @@
#define T uint32_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
index 72b20a6770bd..189d55404d67 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c
@@ -5,16 +5,7 @@
#define T uint64_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
index 3fa615d24108..6a1905e746e6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
@@ -5,16 +5,7 @@
#define T uint8_t
-DEF_VX_BINARY_CASE_0_WRAP(T, +, add)
-DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)
-DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)
-DEF_VX_BINARY_CASE_0_WRAP(T, &, and)
-DEF_VX_BINARY_CASE_0_WRAP(T, |, or)
-DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)
-DEF_VX_BINARY_CASE_0_WRAP(T, /, div)
-DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)
-DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+TEST_BINARY_VX_UNSIGNED_0(T)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
/* { dg-final { scan-assembler-not {vsub.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
index bc75f812539d..7bc3049e1d4d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
@@ -230,4 +230,29 @@ test_vx_binary_##NAME##_##FUNC##_##T##_case_3 (T *
restrict out, \
VX_BINARY_FUNC_BODY_X64(op) \
VX_BINARY_FUNC_BODY_X64(op)
+#define TEST_BINARY_VX_SIGNED_0(T) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, +, add) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, -, sub) \
+ DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, &, and) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, |, or) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, *, mul) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, /, div) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, %, rem) \
+ DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max) \
+ DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+
+#define TEST_BINARY_VX_UNSIGNED_0(T) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, +, add) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, -, sub) \
+ DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, &, and) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, |, or) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, /, div) \
+ DEF_VX_BINARY_CASE_0_WRAP(T, %, rem) \
+ DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max) \
+ DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)
+
#endif
