[gcc r16-1486] or1k: Fix ICE in libgcc caused by recent validate_subreg changes

[Stafford Horne via Gcc-cvs]

https://gcc.gnu.org/g:c0694f95f591ee49dd0fc3d3bef4765bf36ab5a4

commit r16-1486-gc0694f95f591ee49dd0fc3d3bef4765bf36ab5a4
Author: Stafford Horne <sho...@gmail.com>
Date:   Sat Jun 7 14:46:30 2025 +0100

    or1k: Fix ICE in libgcc caused by recent validate_subreg changes
    
    After commit eb2ea476db2 ("emit-rtl: Allow extra checks for
    paradoxical subregs [PR119966]") paradoxical subregs or the OpenRISC
    condition flag register (reg:BI sr_f) are no longer allowed.
    
    This causes and ICE in the ce1 pass which tries to get the or1k flag
    register into an SI register, which is no longer possible.
    
    Adjust or1k_can_change_mode_class to allow changing the or1k flag reg to
    SI mode which in turn allows paradoxical subregs to be generated again.
    
    gcc/ChangeLog:
    
            PR target/120587
            * config/or1k/or1k.cc (or1k_can_change_mode_class): Allow
            changing flags mode from BI to SI to allow for paradoxical
            subregs.

Diff:
---
 gcc/config/or1k/or1k.cc | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/gcc/config/or1k/or1k.cc b/gcc/config/or1k/or1k.cc
index 62e2168e0ee3..f1c92c6bf6c9 100644
--- a/gcc/config/or1k/or1k.cc
+++ b/gcc/config/or1k/or1k.cc
@@ -1408,8 +1408,9 @@ static bool
 or1k_can_change_mode_class (machine_mode from, machine_mode to,
                            reg_class_t rclass)
 {
+  /* Allow cnoverting special flags to SI mode subregs.  */
   if (rclass == FLAG_REGS)
-    return from == to;
+    return from == to || (from == BImode && to == SImode);
   return true;
 }