https://gcc.gnu.org/g:b59354cf309052de6a1c297f06411691c03bfd24

commit r16-1357-gb59354cf309052de6a1c297f06411691c03bfd24
Author: Pan Li <pan2...@intel.com>
Date:   Mon Jun 9 16:28:50 2025 +0800

    RISC-V: Reconcile the existing test for vremu.vx combine
    
    Some existing vrem related test need some adjust for the
    asm check due to cost model.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c: Adjust the
            asm check for vremu.
            * gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c: Ditto.
    
    Signed-off-by: Pan Li <pan2...@intel.com>

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c | 4 ++--
 gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c
index ad918a9b800a..10de7c268e5e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv32gcv.c
@@ -4,8 +4,8 @@
 
 /* { dg-final { scan-assembler-times {\tvrem\.vv} 8 } } */
 /* { dg-final { scan-assembler-not {\tvrem\.vx} } } */
-/* { dg-final { scan-assembler-times {\tvremu\.vv} 5 } } */
-/* { dg-final { scan-assembler-times {\tvremu\.vx} 3 } } */
+/* { dg-final { scan-assembler-times {\tvremu\.vv} 8 } } */
+/* { dg-final { scan-assembler-not {\tvremu\.vx} } } */
 /* { dg-final { scan-tree-dump-times "\.COND_LEN_MOD" 16 "optimized" } } */
 /* { dg-final { scan-assembler-not {\tvmv1r\.v} } } */
 /* { dg-final { scan-assembler-not {\tvmv2r\.v} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c
index 4e28f99e2886..cf187a2bde7c 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-rv64gcv.c
@@ -5,8 +5,8 @@
 
 /* { dg-final { scan-assembler-times {\tvrem\.vv} 8 } } */
 /* { dg-final { scan-assembler-not {\tvrem\.vx} } } */
-/* { dg-final { scan-assembler-times {\tvremu\.vv} 4 } } */
-/* { dg-final { scan-assembler-times {\tvremu\.vx} 4 } } */
+/* { dg-final { scan-assembler-times {\tvremu\.vv} 8 } } */
+/* { dg-final { scan-assembler-not {\tvremu\.vx} } } */
 /* { dg-final { scan-tree-dump-times "\.COND_LEN_MOD" 16 "optimized" } } */
 /* { dg-final { scan-assembler-not {\tvmv1r\.v} } } */
 /* { dg-final { scan-assembler-not {\tvmv2r\.v} } } */

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