https://gcc.gnu.org/g:f58bec28867f6e555ef53b64b1a7dd31b61e64cb
commit f58bec28867f6e555ef53b64b1a7dd31b61e64cb Author: Jiawei <jia...@iscas.ac.cn> Date: Thu Jun 5 13:15:02 2025 +0800 RISC-V: Support Ssccptr extension. Support the Ssccptr extension, which allows the main memory to support page table reads. gcc/ChangeLog: * config/riscv/riscv-ext.def: New extension definition. * config/riscv/riscv-ext.opt: New extension mask. * doc/riscv-ext.texi: Document the new extension. gcc/testsuite/ChangeLog: * gcc.target/riscv/arch-ssccptr.c: New test. Signed-off-by: Jiawei <jia...@iscas.ac.cn> (cherry picked from commit a84b388c84aa7bfed62bf3733330f3c82d37c943) Diff: --- gcc/config/riscv/riscv-ext.def | 13 +++++++++++++ gcc/config/riscv/riscv-ext.opt | 2 ++ gcc/doc/riscv-ext.texi | 4 ++++ gcc/testsuite/gcc.target/riscv/arch-ssccptr.c | 5 +++++ 4 files changed, 24 insertions(+) diff --git a/gcc/config/riscv/riscv-ext.def b/gcc/config/riscv/riscv-ext.def index 98e7b82c8d17..ec0a08c3282c 100644 --- a/gcc/config/riscv/riscv-ext.def +++ b/gcc/config/riscv/riscv-ext.def @@ -1805,6 +1805,19 @@ DEFINE_RISCV_EXT( /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED, /* EXTRA_EXTENSION_FLAGS */ 0) +DEFINE_RISCV_EXT( + /* NAME */ ssccptr, + /* UPPERCASE_NAME */ SSCCPTR, + /* FULL_NAME */ "Main memory supports page table reads", + /* DESC */ "", + /* URL */ , + /* DEP_EXTS */ ({}), + /* SUPPORTED_VERSIONS */ ({{1, 0}}), + /* FLAG_GROUP */ ss, + /* BITMASK_GROUP_ID */ BITMASK_NOT_YET_ALLOCATED, + /* BITMASK_BIT_POSITION*/ BITMASK_NOT_YET_ALLOCATED, + /* EXTRA_EXTENSION_FLAGS */ 0) + DEFINE_RISCV_EXT( /* NAME */ sscofpmf, /* UPPERCASE_NAME */ SSCOFPMF, diff --git a/gcc/config/riscv/riscv-ext.opt b/gcc/config/riscv/riscv-ext.opt index 73868798db68..f851678236bd 100644 --- a/gcc/config/riscv/riscv-ext.opt +++ b/gcc/config/riscv/riscv-ext.opt @@ -355,6 +355,8 @@ Mask(SMDBLTRP) Var(riscv_sm_subext) Mask(SSAIA) Var(riscv_ss_subext) +Mask(SSCCPTR) Var(riscv_ss_subext) + Mask(SSCOFPMF) Var(riscv_ss_subext) Mask(SSCSRIND) Var(riscv_ss_subext) diff --git a/gcc/doc/riscv-ext.texi b/gcc/doc/riscv-ext.texi index 2d2631e726dc..83aa436b4665 100644 --- a/gcc/doc/riscv-ext.texi +++ b/gcc/doc/riscv-ext.texi @@ -534,6 +534,10 @@ @tab 1.0 @tab Advanced interrupt architecture extension for supervisor-mode +@item ssccptr +@tab 1.0 +@tab Main memory supports page table reads + @item sscofpmf @tab 1.0 @tab Count overflow & filtering extension diff --git a/gcc/testsuite/gcc.target/riscv/arch-ssccptr.c b/gcc/testsuite/gcc.target/riscv/arch-ssccptr.c new file mode 100644 index 000000000000..902155a0818c --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/arch-ssccptr.c @@ -0,0 +1,5 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_ssccptr -mabi=lp64" } */ +int foo() +{ +}