https://gcc.gnu.org/g:736bdd7569f4775e19e1256ac6bb565636f93dee
commit 736bdd7569f4775e19e1256ac6bb565636f93dee
Author: Robin Dapp <rd...@ventanamicro.com>
Date: Thu May 8 09:51:45 2025 +0200
RISC-V: Support CPUs in -march.
This patch allows an -march string like
-march=sifive-p670
in order override a previous -march in a simple way.
Suppose we have a Makefile that specifies -march=rv64gc by default.
A user-specified -mcpu=sifive-p670 would be after the -march in the
options string and thus only set -mtune=sifive-p670 (as -mcpu does not
override a previously specified -march or -mtune).
So if we wanted to override we would need to specify the full, lengthy
-march=rv64gcv_... string instead of a simple -mcpu=...
Therefore this patch always first tries to interpret -march= as CPU
string. If it is a supported CPU we use its march properties and let it
override previously specified options. Otherwise the behavior is as
before. This enables the "last-specified option wins" behavior GCC
normally employs.
Note that -march does not imply -mtune like on x86 or other targets.
So an -march=CPU won't override a previously specified -mtune=other-CPU.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc
(riscv_subset_list::parse_base_ext):
Adjust error message.
(riscv_handle_option): Parse as CPU string first.
(riscv_expand_arch): Ditto.
* doc/invoke.texi: Document.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-56.c: New test.
(cherry picked from commit 4a182418c89666e7594bcb0e5edc5194aa147910)
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 19 ++++++++++++-------
gcc/doc/invoke.texi | 2 +-
gcc/testsuite/gcc.target/riscv/arch-56.c | 13 +++++++++++++
3 files changed, 26 insertions(+), 8 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index c843393998cb..a6d8763f032b 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -980,8 +980,9 @@ riscv_subset_list::parse_base_ext (const char *p)
}
else
{
- error_at (m_loc, "%<-march=%s%>: ISA string must begin with rv32, rv64 "
- "or Profiles", m_arch);
+ error_at (m_loc, "%<-march=%s%>: ISA string must begin with rv32, rv64,"
+ " a supported RVA profile or refer to a supported CPU",
+ m_arch);
return NULL;
}
@@ -1708,7 +1709,8 @@ riscv_handle_option (struct gcc_options *opts,
switch (decoded->opt_index)
{
case OPT_march_:
- riscv_parse_arch_string (decoded->arg, opts, loc);
+ if (riscv_find_cpu (decoded->arg) == NULL)
+ riscv_parse_arch_string (decoded->arg, opts, loc);
return true;
case OPT_mcpu_:
@@ -1725,15 +1727,18 @@ riscv_handle_option (struct gcc_options *opts,
/* Expand arch string with implied extensions. */
const char *
-riscv_expand_arch (int argc ATTRIBUTE_UNUSED,
+riscv_expand_arch (int argc,
const char **argv)
{
gcc_assert (argc == 1);
location_t loc = UNKNOWN_LOCATION;
- riscv_parse_arch_string (argv[0], NULL, loc);
+ /* Try to interpret the arch as CPU first. */
+ const char *arch_str = riscv_expand_arch_from_cpu (argc, argv);
+ if (!strlen (arch_str))
+ riscv_parse_arch_string (argv[0], NULL, loc);
const std::string arch = riscv_arch_str (false);
- if (arch.length())
- return xasprintf ("-march=%s", arch.c_str());
+ if (arch.length ())
+ return xasprintf ("-march=%s", arch.c_str ());
else
return "";
}
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index c98c2532c18a..cfcb4b3cf978 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1267,7 +1267,7 @@ See RS/6000 and PowerPC Options.
-mfence-tso -mno-fence-tso
-mdiv -mno-div
-misa-spec=@var{ISA-spec-string}
--march=@var{ISA-string|Profiles|Profiles_ISA-string}
+-march=@var{ISA-string|Profiles|Profiles_ISA-string|CPU/processor string}
-mtune=@var{processor-string}
-mpreferred-stack-boundary=@var{num}
-msmall-data-limit=@var{N-bytes}
diff --git a/gcc/testsuite/gcc.target/riscv/arch-56.c
b/gcc/testsuite/gcc.target/riscv/arch-56.c
new file mode 100644
index 000000000000..e075f9661eef
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/arch-56.c
@@ -0,0 +1,13 @@
+/* Check whether the second -march overrides the first. */
+/* { dg-do compile { target rv64 } } */
+/* { dg-options "-O3 -march=rv64gc -march=sifive-p670" } */
+
+void
+foo (char *a, char *b, int n)
+{
+ for (int i = 0; i < n; i++)
+ a[i] = b[i] + 1;
+}
+
+/* { dg-final { scan-assembler "vset" } } */
+/* { dg-final { scan-assembler "zvl128b" } } */
