https://gcc.gnu.org/g:fd9674dfa52a259a4788814bd16253bb7b5861e3
commit fd9674dfa52a259a4788814bd16253bb7b5861e3
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Thu May 29 02:38:13 2025 -0400
Revert changes
Diff:
---
gcc/config/rs6000/rs6000.cc | 8 +------
gcc/config/rs6000/rs6000.md | 27 ++++++++--------------
gcc/testsuite/gcc.target/powerpc/float128-cmove.c | 6 +----
.../gcc.target/powerpc/float128-minmax-3.c | 6 +----
4 files changed, 12 insertions(+), 35 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 0ef509f06230..7ea377781034 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -16409,17 +16409,11 @@ rs6000_maybe_emit_fp_cmove (rtx dest, rtx op, rtx
true_cond, rtx false_cond)
/* Helper function to return true if the target has instructions to do a
compare and set mask instruction that can be used with XXSEL to implement a
conditional move. It is also assumed that such a target also supports the
- "C" minimum and maximum instructions.
-
- However, these instructions will trap if given a signaling NaN, so we can
- only use them if NaNs are not expected. */
+ "C" minimum and maximum instructions. */
static bool
have_compare_and_set_mask (machine_mode mode)
{
- if (!flag_finite_math_only)
- return false;
-
switch (mode)
{
case E_SFmode:
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index c13101eb4318..9c718ca2a226 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -5653,10 +5653,6 @@
"fsel %0,%1,%2,%3"
[(set_attr "type" "fp")])
-;; On power9, we can generate XSCMP{EQ,GT,GE}DP and XXSEL to do a floating
-;; point conditional move. However, these instructions trap if one of the
-;; arguments is a signalling NaN. Therefore we can only do this optimize if
-;; NaNs are not expected in the code.
(define_insn_and_split "*mov<SFDF:mode><SFDF2:mode>cc_p9"
[(set (match_operand:SFDF 0 "vsx_register_operand" "=&wa,wa")
(if_then_else:SFDF
@@ -5666,7 +5662,7 @@
(match_operand:SFDF 4 "vsx_register_operand" "wa,wa")
(match_operand:SFDF 5 "vsx_register_operand" "wa,wa")))
(clobber (match_scratch:V2DI 6 "=0,&wa"))]
- "TARGET_P9_MINMAX && flag_finite_math_only"
+ "TARGET_P9_MINMAX"
"#"
"&& 1"
[(set (match_dup 6)
@@ -5698,7 +5694,7 @@
(match_operand:SFDF 4 "vsx_register_operand" "wa,wa")
(match_operand:SFDF 5 "vsx_register_operand" "wa,wa")))
(clobber (match_scratch:V2DI 6 "=0,&wa"))]
- "TARGET_P9_MINMAX && flag_finite_math_only"
+ "TARGET_P9_MINMAX"
"#"
"&& 1"
[(set (match_dup 6)
@@ -5733,7 +5729,7 @@
(match_operand:SFDF 3 "vsx_register_operand" "wa")])
(match_operand:V2DI 4 "all_ones_constant" "")
(match_operand:V2DI 5 "zero_constant" "")))]
- "TARGET_P9_MINMAX && flag_finite_math_only"
+ "TARGET_P9_MINMAX"
"xscmp%V1dp %x0,%x2,%x3"
[(set_attr "type" "fpcompare")])
@@ -5743,23 +5739,18 @@
(match_operand:V2DI 2 "zero_constant" ""))
(match_operand:SFDF 3 "vsx_register_operand" "wa")
(match_operand:SFDF 4 "vsx_register_operand" "wa")))]
- "TARGET_P9_MINMAX && flag_finite_math_only"
+ "TARGET_P9_MINMAX"
"xxsel %x0,%x4,%x3,%x1"
[(set_attr "type" "vecmove")])
;; Support for ISA 3.1 IEEE 128-bit conditional move. The mode used in the
;; comparison must be the same as used in the move.
-;;
-;; On power10, we can generate XSCMP{EQ,GT,GE}QP and XXSEL to do a floating
-;; point conditional move for IEEE 128-bit values. However, these instructions
-;; trap if one of the arguments is a signalling NaN. Therefore we can only do
-;; this optimize if NaNs are not expected in the code.
(define_expand "mov<mode>cc"
[(set (match_operand:IEEE128 0 "gpc_reg_operand")
(if_then_else:IEEE128 (match_operand 1 "comparison_operator")
(match_operand:IEEE128 2 "gpc_reg_operand")
(match_operand:IEEE128 3 "gpc_reg_operand")))]
- "TARGET_POWER10 && TARGET_FLOAT128_HW && flag_finite_math_only"
+ "TARGET_POWER10 && TARGET_FLOAT128_HW"
{
if (rs6000_emit_cmove (operands[0], operands[1], operands[2], operands[3]))
DONE;
@@ -5776,7 +5767,7 @@
(match_operand:IEEE128 4 "altivec_register_operand" "v,v")
(match_operand:IEEE128 5 "altivec_register_operand" "v,v")))
(clobber (match_scratch:V2DI 6 "=0,&v"))]
- "TARGET_POWER10 && TARGET_FLOAT128_HW && flag_finite_math_only"
+ "TARGET_POWER10 && TARGET_FLOAT128_HW"
"#"
"&& 1"
[(set (match_dup 6)
@@ -5808,7 +5799,7 @@
(match_operand:IEEE128 4 "altivec_register_operand" "v,v")
(match_operand:IEEE128 5 "altivec_register_operand" "v,v")))
(clobber (match_scratch:V2DI 6 "=0,&v"))]
- "TARGET_POWER10 && TARGET_FLOAT128_HW && flag_finite_math_only"
+ "TARGET_POWER10 && TARGET_FLOAT128_HW"
"#"
"&& 1"
[(set (match_dup 6)
@@ -5843,7 +5834,7 @@
(match_operand:IEEE128 3 "altivec_register_operand" "v")])
(match_operand:V2DI 4 "all_ones_constant" "")
(match_operand:V2DI 5 "zero_constant" "")))]
- "TARGET_POWER10 && TARGET_FLOAT128_HW && flag_finite_math_only"
+ "TARGET_POWER10 && TARGET_FLOAT128_HW"
"xscmp%V1qp %0,%2,%3"
[(set_attr "type" "fpcompare")])
@@ -5854,7 +5845,7 @@
(match_operand:V2DI 2 "zero_constant" ""))
(match_operand:IEEE128 3 "altivec_register_operand" "v")
(match_operand:IEEE128 4 "altivec_register_operand" "v")))]
- "TARGET_POWER10 && TARGET_FLOAT128_HW && flag_finite_math_only"
+ "TARGET_POWER10 && TARGET_FLOAT128_HW"
"xxsel %x0,%x4,%x3,%x1"
[(set_attr "type" "vecmove")])
diff --git a/gcc/testsuite/gcc.target/powerpc/float128-cmove.c
b/gcc/testsuite/gcc.target/powerpc/float128-cmove.c
index 496fe29740c8..2fae8dc23bcf 100644
--- a/gcc/testsuite/gcc.target/powerpc/float128-cmove.c
+++ b/gcc/testsuite/gcc.target/powerpc/float128-cmove.c
@@ -1,11 +1,7 @@
/* { dg-do compile } */
/* { dg-require-effective-target ppc_float128_hw } */
/* { dg-require-effective-target power10_ok } */
-/* { dg-options "-mdejagnu-cpu=power10 -Ofast" } */
-
-/* The XSCMP{EQ,GT,GE}QP instructions will trap if a signaling NaN is one of
- the arguments, so this code is now only generated if -Ofast or
- -ffinite-math-only is used. */
+/* { dg-options "-mdejagnu-cpu=power10 -O2" } */
#ifndef TYPE
#ifdef __LONG_DOUBLE_IEEE128__
diff --git a/gcc/testsuite/gcc.target/powerpc/float128-minmax-3.c
b/gcc/testsuite/gcc.target/powerpc/float128-minmax-3.c
index 9c7474911981..6f7627c0f2a1 100644
--- a/gcc/testsuite/gcc.target/powerpc/float128-minmax-3.c
+++ b/gcc/testsuite/gcc.target/powerpc/float128-minmax-3.c
@@ -1,10 +1,6 @@
/* { dg-require-effective-target ppc_float128_hw } */
/* { dg-require-effective-target power10_ok } */
-/* { dg-options "-mdejagnu-cpu=power10 -Ofast" } */
-
-/* The XS{MAX,MIN}}CQP instructions will trap if a signaling NaN is one of the
- arguments, so this code is now only generated if -Ofast or
- -ffinite-math-only is used. */
+/* { dg-options "-mdejagnu-cpu=power10 -O2" } */
#ifndef TYPE
#define TYPE _Float128
