https://gcc.gnu.org/g:d4a2f9ba6ece32fb8500f10204fcf409aa26fbfb
commit r16-933-gd4a2f9ba6ece32fb8500f10204fcf409aa26fbfb
Author: Pan Li <pan2...@intel.com>
Date: Tue May 27 10:27:01 2025 +0800
RISC-V: Add test cases for avg_floor vaadd implementation
Add asm and run testcase for avg_floor vaadd implementation.
The below test suites are passed for this patch series.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/avg.h: New test.
* gcc.target/riscv/rvv/autovec/avg_data.h: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c: New test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i32.c: New
test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i64.c: New
test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32-from-i64.c: New
test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i16.c: New
test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i32.c: New
test.
* gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i64.c: New
test.
* gcc.target/riscv/rvv/autovec/avg_run.h: New test.
Signed-off-by: Pan Li <pan2...@intel.com>
Diff:
---
gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h | 23 +++
.../gcc.target/riscv/rvv/autovec/avg_data.h | 185 +++++++++++++++++++++
.../riscv/rvv/autovec/avg_floor-1-i16-from-i32.c | 12 ++
.../riscv/rvv/autovec/avg_floor-1-i16-from-i64.c | 12 ++
.../riscv/rvv/autovec/avg_floor-1-i32-from-i64.c | 12 ++
.../riscv/rvv/autovec/avg_floor-1-i8-from-i16.c | 12 ++
.../riscv/rvv/autovec/avg_floor-1-i8-from-i32.c | 12 ++
.../riscv/rvv/autovec/avg_floor-1-i8-from-i64.c | 12 ++
.../rvv/autovec/avg_floor-run-1-i16-from-i32.c | 16 ++
.../rvv/autovec/avg_floor-run-1-i16-from-i64.c | 16 ++
.../rvv/autovec/avg_floor-run-1-i32-from-i64.c | 16 ++
.../rvv/autovec/avg_floor-run-1-i8-from-i16.c | 16 ++
.../rvv/autovec/avg_floor-run-1-i8-from-i32.c | 16 ++
.../rvv/autovec/avg_floor-run-1-i8-from-i64.c | 16 ++
.../gcc.target/riscv/rvv/autovec/avg_run.h | 26 +++
15 files changed, 402 insertions(+)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h
new file mode 100644
index 000000000000..746c635ae577
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg.h
@@ -0,0 +1,23 @@
+#ifndef HAVE_DEFINED_AVG_H
+#define HAVE_DEFINED_AVG_H
+
+#include <stdint.h>
+
+#define DEF_AVG_0(NT, WT, NAME) \
+__attribute__((noinline)) \
+void \
+test_##NAME##_##WT##_##NT##_0(NT * restrict a, NT * restrict b, \
+ NT * restrict out, int n) \
+{ \
+ for (int i = 0; i < n; i++) { \
+ out[i] = (NT)(((WT)a[i] + (WT)b[i]) >> 1); \
+ } \
+}
+#define DEF_AVG_0_WRAP(NT, WT, NAME) DEF_AVG_0(NT, WT, NAME)
+
+#define RUN_AVG_0(NT, WT, NAME, a, b, out, n) \
+ test_##NAME##_##WT##_##NT##_0(a, b, out, n)
+#define RUN_AVG_0_WRAP(NT, WT, NAME, a, b, out, n) \
+ RUN_AVG_0(NT, WT, NAME, a, b, out, n)
+
+#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_data.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_data.h
new file mode 100644
index 000000000000..cbeed147a565
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_data.h
@@ -0,0 +1,185 @@
+#ifndef HAVE_DEFINED_AVG_DATA_H
+#define HAVE_DEFINED_AVG_DATA_H
+
+#define N 16
+
+#define TEST_AVG_DATA(T, NAME) test_##T##_##NAME##_data
+#define TEST_AVG_DATA_WRAP(T, NAME) TEST_AVG_DATA(T, NAME)
+
+int8_t TEST_AVG_DATA(int8_t, avg_floor)[][3][N] =
+{
+ {
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ 8, 8, 8, 8,
+ },
+ {
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ -2, -2, -2, -2,
+ 1, 1, 1, 1,
+ },
+ {
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ -2, -2, -2, -2,
+ 4, 4, 4, 4,
+ },
+ },
+ {
+ {
+ 127, 127, 127, 127,
+ 127, 127, 127, 127,
+ -128, -128, -128, -128,
+ -128, -128, -128, -128,
+ },
+ {
+ 126, 126, 126, 126,
+ -2, -2, -2, -2,
+ 127, 127, 127, 127,
+ -127, -127, -127, -127,
+ },
+ {
+ 126, 126, 126, 126,
+ 62, 62, 62, 62,
+ -1, -1, -1, -1,
+ -128, -128, -128, -128,
+ },
+ },
+};
+
+int16_t TEST_AVG_DATA(int16_t, avg_floor)[][3][N] =
+{
+ {
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ 8, 8, 8, 8,
+ },
+ {
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ -2, -2, -2, -2,
+ 1, 1, 1, 1,
+ },
+ {
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ -2, -2, -2, -2,
+ 4, 4, 4, 4,
+ },
+ },
+ {
+ {
+ 32767, 32767, 32767, 32767,
+ 32767, 32767, 32767, 32767,
+ -32768, -32768, -32768, -32768,
+ -32768, -32768, -32768, -32768,
+ },
+ {
+ 32766, 32766, 32766, 32766,
+ -2, -2, -2, -2,
+ 32767, 32767, 32767, 32767,
+ -32767, -32767, -32767, -32767,
+ },
+ {
+ 32766, 32766, 32766, 32766,
+ 16382, 16382, 16382, 16382,
+ -1, -1, -1, -1,
+ -32768, -32768, -32768, -32768,
+ },
+ },
+};
+
+int32_t TEST_AVG_DATA(int32_t, avg_floor)[][3][N] =
+{
+ {
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ 8, 8, 8, 8,
+ },
+ {
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ -2, -2, -2, -2,
+ 1, 1, 1, 1,
+ },
+ {
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ -2, -2, -2, -2,
+ 4, 4, 4, 4,
+ },
+ },
+ {
+ {
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ },
+ {
+ 2147483646, 2147483646, 2147483646, 2147483646,
+ -2, -2, -2, -2,
+ 2147483647, 2147483647, 2147483647, 2147483647,
+ -2147483647, -2147483647, -2147483647, -2147483647,
+ },
+ {
+ 2147483646, 2147483646, 2147483646, 2147483646,
+ 1073741822, 1073741822, 1073741822, 1073741822,
+ -1, -1, -1, -1,
+ -2147483648, -2147483648, -2147483648, -2147483648,
+ },
+ },
+};
+
+int64_t TEST_AVG_DATA(int64_t, avg_floor)[][3][N] =
+{
+ {
+ {
+ 0, 0, 0, 0,
+ 1, 1, 1, 1,
+ -1, -1, -1, -1,
+ 8, 8, 8, 8,
+ },
+ {
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ -2, -2, -2, -2,
+ 1, 1, 1, 1,
+ },
+ {
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ -2, -2, -2, -2,
+ 4, 4, 4, 4,
+ },
+ },
+ {
+ {
+ 9223372036854775807ull, 9223372036854775807ull,
9223372036854775807ull, 9223372036854775807ull,
+ 9223372036854775807ull, 9223372036854775807ull,
9223372036854775807ull, 9223372036854775807ull,
+ -9223372036854775808ull, -9223372036854775808ull,
-9223372036854775808ull, -9223372036854775808ull,
+ -9223372036854775808ull, -9223372036854775808ull,
-9223372036854775808ull, -9223372036854775808ull,
+ },
+ {
+ 9223372036854775806ull, 9223372036854775806ull,
9223372036854775806ull, 9223372036854775806ull,
+ 9223372036854775807ull, 9223372036854775807ull,
9223372036854775807ull, 9223372036854775807ull,
+ -2ull, -2ull,
-2ull, -2ull,
+ -9223372036854775807ull, -9223372036854775807ull,
-9223372036854775807ull, -9223372036854775807ull,
+ },
+ {
+ 9223372036854775806ull, 9223372036854775806ull,
9223372036854775806ull, 9223372036854775806ull,
+ 4611686018427387902ull, 4611686018427387902ull,
4611686018427387902ull, 4611686018427387902ull,
+ -1ull, -1ull,
-1ull, -1ull,
+ -9223372036854775808ull, -9223372036854775808ull,
-9223372036854775808ull, -9223372036854775808ull,
+ },
+ },
+};
+
+#endif
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c
new file mode 100644
index 000000000000..16ba96735000
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "avg.h"
+
+#define NT int16_t
+#define WT int32_t
+
+DEF_AVG_0(NT, WT, avg_floor)
+
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */
+/* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c
new file mode 100644
index 000000000000..b229b4b5703a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "avg.h"
+
+#define NT int16_t
+#define WT int64_t
+
+DEF_AVG_0(NT, WT, avg_floor)
+
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */
+/* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c
new file mode 100644
index 000000000000..5f946bbc8cd4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "avg.h"
+
+#define NT int32_t
+#define WT int64_t
+
+DEF_AVG_0(NT, WT, avg_floor)
+
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */
+/* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c
new file mode 100644
index 000000000000..5d9297a6c394
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "avg.h"
+
+#define NT int8_t
+#define WT int16_t
+
+DEF_AVG_0(NT, WT, avg_floor)
+
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */
+/* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c
new file mode 100644
index 000000000000..5c5d4ea40bb1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "avg.h"
+
+#define NT int8_t
+#define WT int32_t
+
+DEF_AVG_0(NT, WT, avg_floor)
+
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */
+/* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c
new file mode 100644
index 000000000000..f297953aadf4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d" } */
+
+#include "avg.h"
+
+#define NT int8_t
+#define WT int64_t
+
+DEF_AVG_0(NT, WT, avg_floor)
+
+/* { dg-final { scan-assembler-times {csrwi\s*vxrm,\s*2} 1 } } */
+/* { dg-final { scan-assembler-times {vaadd.vv} 1 } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i32.c
new file mode 100644
index 000000000000..9d0dd618e56b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -O3" } */
+
+#include "avg.h"
+#include "avg_data.h"
+
+#define WT int32_t
+#define NT int16_t
+#define NAME avg_floor
+
+DEF_AVG_0_WRAP(NT, WT, NAME)
+
+#define TEST_DATA TEST_AVG_DATA_WRAP(NT, NAME)
+#define TEST_RUN(NT, WT, NAME, a, b, out, n) RUN_AVG_0_WRAP(NT, WT, NAME, a,
b, out, n)
+
+#include "avg_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i64.c
new file mode 100644
index 000000000000..2736baa36e8c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -O3" } */
+
+#include "avg.h"
+#include "avg_data.h"
+
+#define WT int64_t
+#define NT int16_t
+#define NAME avg_floor
+
+DEF_AVG_0_WRAP(NT, WT, NAME)
+
+#define TEST_DATA TEST_AVG_DATA_WRAP(NT, NAME)
+#define TEST_RUN(NT, WT, NAME, a, b, out, n) RUN_AVG_0_WRAP(NT, WT, NAME, a,
b, out, n)
+
+#include "avg_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32-from-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32-from-i64.c
new file mode 100644
index 000000000000..2334045bfa4b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32-from-i64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -O3" } */
+
+#include "avg.h"
+#include "avg_data.h"
+
+#define WT int64_t
+#define NT int32_t
+#define NAME avg_floor
+
+DEF_AVG_0_WRAP(NT, WT, NAME)
+
+#define TEST_DATA TEST_AVG_DATA_WRAP(NT, NAME)
+#define TEST_RUN(NT, WT, NAME, a, b, out, n) RUN_AVG_0_WRAP(NT, WT, NAME, a,
b, out, n)
+
+#include "avg_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i16.c
new file mode 100644
index 000000000000..836474844d2a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i16.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -O3" } */
+
+#include "avg.h"
+#include "avg_data.h"
+
+#define WT int16_t
+#define NT int8_t
+#define NAME avg_floor
+
+DEF_AVG_0_WRAP(NT, WT, NAME)
+
+#define TEST_DATA TEST_AVG_DATA_WRAP(NT, NAME)
+#define TEST_RUN(NT, WT, NAME, a, b, out, n) RUN_AVG_0_WRAP(NT, WT, NAME, a,
b, out, n)
+
+#include "avg_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i32.c
new file mode 100644
index 000000000000..157c9360ce04
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i32.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -O3" } */
+
+#include "avg.h"
+#include "avg_data.h"
+
+#define WT int32_t
+#define NT int8_t
+#define NAME avg_floor
+
+DEF_AVG_0_WRAP(NT, WT, NAME)
+
+#define TEST_DATA TEST_AVG_DATA_WRAP(NT, NAME)
+#define TEST_RUN(NT, WT, NAME, a, b, out, n) RUN_AVG_0_WRAP(NT, WT, NAME, a,
b, out, n)
+
+#include "avg_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i64.c
new file mode 100644
index 000000000000..2db0d3cb37e1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i64.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 -O3" } */
+
+#include "avg.h"
+#include "avg_data.h"
+
+#define WT int64_t
+#define NT int8_t
+#define NAME avg_floor
+
+DEF_AVG_0_WRAP(NT, WT, NAME)
+
+#define TEST_DATA TEST_AVG_DATA_WRAP(NT, NAME)
+#define TEST_RUN(NT, WT, NAME, a, b, out, n) RUN_AVG_0_WRAP(NT, WT, NAME, a,
b, out, n)
+
+#include "avg_run.h"
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_run.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_run.h
new file mode 100644
index 000000000000..a6bbee9b02b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/avg_run.h
@@ -0,0 +1,26 @@
+#ifndef HAVE_DEFINED_AVG_RUN_H
+#define HAVE_DEFINED_AVG_RUN_H
+
+int
+main ()
+{
+ unsigned i, k;
+ NT out[N];
+
+ for (i = 0; i < sizeof (TEST_DATA) / sizeof (TEST_DATA[0]); i++)
+ {
+ NT *a = TEST_DATA[i][0];
+ NT *b = TEST_DATA[i][1];
+ NT *expect = TEST_DATA[i][2];
+
+ TEST_RUN (NT, WT, NAME, a, b, out, N);
+
+ for (k = 0; k < N; k++)
+ if (out[k] != expect[k])
+ __builtin_abort ();
+ }
+
+ return 0;
+}
+
+#endif
