https://gcc.gnu.org/g:12ec0a2f6ac3fc6ad961ce17ec2a61605f4ff801
commit 12ec0a2f6ac3fc6ad961ce17ec2a61605f4ff801
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Mon May 19 18:37:08 2025 -0400
Revert changes
Diff:
---
gcc/config/rs6000/rs6000.md | 46 ---------------------------
gcc/config/rs6000/vsx.md | 18 -----------
gcc/testsuite/gcc.target/powerpc/builtins-1.c | 2 +-
gcc/testsuite/gcc.target/powerpc/pr108958.c | 27 ----------------
gcc/testsuite/gcc.target/powerpc/pr99293.c | 22 -------------
5 files changed, 1 insertion(+), 114 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 65da0c653304..4c2bc81caf56 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -1026,52 +1026,6 @@
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
-(define_insn_and_split "zero_extendditi2"
- [(set (match_operand:TI 0 "gpc_reg_operand" "=r,wa,&wa")
- (zero_extend:TI
- (match_operand:DI 1 "gpc_reg_operand" "rwa,r,wa")))]
- "TARGET_P9_VECTOR && TARGET_POWERPC64"
- "@
- #
- mtvsrdd %x0,0,%1
- #"
- "&& reload_completed
- && (int_reg_operand (operands[0], TImode)
- || vsx_register_operand (operands[1], DImode))"
- [(set (match_dup 2)
- (match_dup 3))
- (set (match_dup 4)
- (match_dup 5))]
-{
- rtx op0 = operands[0];
- rtx op1 = operands[1];
- int r = reg_or_subregno (op0);
-
- if (int_reg_operand (op0, TImode))
- {
- int lo = BYTES_BIG_ENDIAN ? 1 : 0;
- int hi = 1 - lo;
-
- operands[2] = gen_rtx_REG (DImode, r + lo);
- operands[3] = op1;
- operands[4] = gen_rtx_REG (DImode, r + hi);
- operands[5] = const0_rtx;
- }
- else
- {
- rtx op0_di = gen_rtx_REG (DImode, r);
- rtx op0_v2di = gen_rtx_REG (V2DImode, r);
- rtx lo = WORDS_BIG_ENDIAN ? op1 : op0_di;
- rtx hi = WORDS_BIG_ENDIAN ? op0_di : op1;
-
- operands[2] = op0_v2di;
- operands[3] = CONST0_RTX (V2DImode);
- operands[4] = op0_v2di;
- operands[5] = gen_rtx_VEC_CONCAT (V2DImode, hi, lo);
- }
-}
- [(set_attr "type" "*,mtvsr,vecperm")
- (set_attr "length" "8,*,8")])
(define_insn "extendqi<mode>2"
[(set (match_operand:EXTQI 0 "gpc_reg_operand" "=r,?*v")
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index d84a2a357a31..dd3573b80868 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -4798,24 +4798,6 @@
"lxvdsx %x0,%y1"
[(set_attr "type" "vecload")])
-;; Optimize SPLAT of an extract from a V2DF/V2DI vector with a constant element
-(define_insn "*vsx_splat_extract_<mode>"
- [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")
- (vec_duplicate:VSX_D
- (vec_select:<VEC_base>
- (match_operand:VSX_D 1 "vsx_register_operand" "wa")
- (parallel [(match_operand 2 "const_0_to_1_operand" "n")]))))]
- "VECTOR_MEM_VSX_P (<MODE>mode)"
-{
- int which_word = INTVAL (operands[2]);
- if (!BYTES_BIG_ENDIAN)
- which_word = 1 - which_word;
-
- operands[3] = GEN_INT (which_word ? 3 : 0);
- return "xxpermdi %x0,%x1,%x1,%3";
-}
- [(set_attr "type" "vecperm")])
-
;; V4SI splat support
(define_insn "vsx_splat_v4si"
[(set (match_operand:V4SI 0 "vsx_register_operand" "=wa,wa")
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1.c
b/gcc/testsuite/gcc.target/powerpc/builtins-1.c
index 4e7e5384675f..8410a5fd4319 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-1.c
@@ -1035,4 +1035,4 @@ foo156 (vector unsigned short usa)
/* { dg-final { scan-assembler-times {\mvmrglb\M} 3 } } */
/* { dg-final { scan-assembler-times {\mvmrgew\M} 4 } } */
/* { dg-final { scan-assembler-times {\mvsplth|xxsplth\M} 4 } } */
-/* { dg-final { scan-assembler-times {\mxxpermdi\M} 42 } } */
+/* { dg-final { scan-assembler-times {\mxxpermdi\M} 44 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr108958.c
b/gcc/testsuite/gcc.target/powerpc/pr108958.c
deleted file mode 100644
index 03eb58d069e7..000000000000
--- a/gcc/testsuite/gcc.target/powerpc/pr108958.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target int128 } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-options "-mdejagnu-cpu=power9 -O2" } */
-
-/* PR target/108958, use mtvsrdd to zero extend gpr to vsx register. */
-
-void
-gpr_to_vsx (unsigned long long x, __uint128_t *p)
-{
- /* mtvsrdd vsx,0,gpr. */
- __uint128_t y = x;
- __asm__ (" # %x0" : "+wa" (y));
- *p = y;
-}
-
-void
-gpr_to_gpr (unsigned long long x, __uint128_t *p)
-{
- /* mr and li. */
- __uint128_t y = x;
- __asm__ (" # %0" : "+r" (y));
- *p = y;
-}
-
-/* { dg-final { scan-assembler-times {\mli\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mmtvsrdd .*,0,.*\M} 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/pr99293.c
b/gcc/testsuite/gcc.target/powerpc/pr99293.c
deleted file mode 100644
index 20adc1f27f65..000000000000
--- a/gcc/testsuite/gcc.target/powerpc/pr99293.c
+++ /dev/null
@@ -1,22 +0,0 @@
-/* { dg-do compile { target powerpc*-*-* } } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-O2 -mvsx" } */
-
-/* Test for PR 99263, which wants to do:
- __builtin_vec_splats (__builtin_vec_extract (v, n))
-
- where v is a V2DF or V2DI vector and n is either 0 or 1. Previously the
- compiler would do a direct move to the GPR registers to select the item and
a
- direct move from the GPR registers to do the splat. */
-
-vector long long splat_dup_l_0 (vector long long v)
-{
- return __builtin_vec_splats (__builtin_vec_extract (v, 0));
-}
-
-vector long long splat_dup_l_1 (vector long long v)
-{
- return __builtin_vec_splats (__builtin_vec_extract (v, 1));
-}
-
-/* { dg-final { scan-assembler-times "xxpermdi" 2 } } */
