https://gcc.gnu.org/g:cd694ab6c758cdbcf5f8816a0f2bd70448681c6a
commit r16-483-gcd694ab6c758cdbcf5f8816a0f2bd70448681c6a
Author: Pan Li <pan2...@intel.com>
Date: Wed May 7 20:48:40 2025 +0800
RISC-V: Rename VX_BINARY test helper to VX_BINARY_CASE_0
This patch would like to rename the VX_BINARY within CASE_0 suffix, as
we have another case of VX_BINARY test code. Aka case 1:
L1:
vmv.v.x
vadd.vv
J L1
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Rename VX_BINARY
to VX_BINARY_CASE_0 for underlying case 1.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c: Take the
new name for test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c: Ditto
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c: Ditto
Signed-off-by: Pan Li <pan2...@intel.com>
Diff:
---
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h | 18 +++++++++---------
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c | 2 +-
.../gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c | 2 +-
.../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c | 4 ++--
.../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c | 4 ++--
.../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c | 4 ++--
.../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c | 4 ++--
.../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c | 4 ++--
.../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c | 4 ++--
.../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c | 4 ++--
.../riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c | 4 ++--
33 files changed, 49 insertions(+), 49 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
index 66654eb90227..de5b70dd04b6 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
@@ -3,15 +3,15 @@
#include <stdint.h>
-#define DEF_VX_BINARY(T, OP) \
-void \
-test_vx_binary (T * restrict out, T * restrict in, T x, unsigned n) \
-{ \
- for (unsigned i = 0; i < n; i++) \
- out[i] = in[i] OP x; \
+#define DEF_VX_BINARY_CASE_0(T, OP) \
+void \
+test_vx_binary_case_0 (T * restrict out, T * restrict in, T x, unsigned n) \
+{ \
+ for (unsigned i = 0; i < n; i++) \
+ out[i] = in[i] OP x; \
}
-#define DEF_VX_BINARY_WRAP(T, OP) DEF_VX_BINARY(T, OP)
-#define RUN_VX_BINARY(out, in, x, n) test_vx_binary(out, in, x, n)
-#define RUN_VX_BINARY_WRAP(out, in, x, n) RUN_VX_BINARY(out, in, x, n)
+#define DEF_VX_BINARY_CASE_0_WRAP(T, OP) DEF_VX_BINARY_CASE_0(T, OP)
+#define RUN_VX_BINARY_CASE_0(out, in, x, n) test_vx_binary_case_0(out,
in, x, n)
+#define RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n) RUN_VX_BINARY_CASE_0(out, in,
x, n)
#endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c
index 488bc75c05d1..6de21a874dbc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int16_t, +)
+DEF_VX_BINARY_CASE_0(int16_t, +)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c
index aeba8354dae1..f46be7ac8d61 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int32_t, +)
+DEF_VX_BINARY_CASE_0(int32_t, +)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c
index ed0b9378415a..2b57b289e84f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int64_t, +)
+DEF_VX_BINARY_CASE_0(int64_t, +)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c
index 781d3c0d1914..e1392845c667 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-i8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int8_t, +)
+DEF_VX_BINARY_CASE_0(int8_t, +)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c
index c01fc23819d2..0266d44164e4 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint16_t, +)
+DEF_VX_BINARY_CASE_0(uint16_t, +)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c
index 631984926096..c5417330973d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint32_t, +)
+DEF_VX_BINARY_CASE_0(uint32_t, +)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c
index 36eec53ea1ed..e9e21628a999 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint64_t, +)
+DEF_VX_BINARY_CASE_0(uint64_t, +)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c
index 6bf4b61b0921..da71fff2c405 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-1-u8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint8_t, +)
+DEF_VX_BINARY_CASE_0(uint8_t, +)
/* { dg-final { scan-assembler-times {vadd.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c
index eb19938afe56..b40d0b86df64 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int16_t, +)
+DEF_VX_BINARY_CASE_0(int16_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c
index 24182c51811e..af3a40d56acd 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int32_t, +)
+DEF_VX_BINARY_CASE_0(int32_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c
index b3d3d4b7d209..5f7c51c2fc42 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int64_t, +)
+DEF_VX_BINARY_CASE_0(int64_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c
index fb353151b53c..420cf0e29a1e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-i8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int8_t, +)
+DEF_VX_BINARY_CASE_0(int8_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c
index 6ba265893f15..7741d06bfa5b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint16_t, +)
+DEF_VX_BINARY_CASE_0(uint16_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c
index b60412cecfa1..10ff20ef1365 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint32_t, +)
+DEF_VX_BINARY_CASE_0(uint32_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c
index a2732943e90a..fa5ab40e9ad5 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint64_t, +)
+DEF_VX_BINARY_CASE_0(uint64_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c
index f3c41f9ebb82..0374e1f0b4bc 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-2-u8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint8_t, +)
+DEF_VX_BINARY_CASE_0(uint8_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c
index f3a262711a4a..f7669070d6c9 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int16_t, +)
+DEF_VX_BINARY_CASE_0(int16_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c
index 490854cfbd7b..1b47a59c9f31 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int32_t, +)
+DEF_VX_BINARY_CASE_0(int32_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c
index a7448dfa56b0..92ab1e8530e7 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int64_t, +)
+DEF_VX_BINARY_CASE_0(int64_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c
index 72c7cd803fac..444707e01347 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-i8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(int8_t, +)
+DEF_VX_BINARY_CASE_0(int8_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c
index 552b4ed7c2fa..e3fc112dfa33 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u16.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint16_t, +)
+DEF_VX_BINARY_CASE_0(uint16_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c
index e319672fc044..f76971bbb764 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u32.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint32_t, +)
+DEF_VX_BINARY_CASE_0(uint32_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c
index 6e2a89e90727..09a4b42d880d 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u64.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint64_t, +)
+DEF_VX_BINARY_CASE_0(uint64_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c
index d3383e25b017..5a0679fc2bf4 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-3-u8.c
@@ -3,6 +3,6 @@
#include "vx_binary.h"
-DEF_VX_BINARY(uint8_t, +)
+DEF_VX_BINARY_CASE_0(uint8_t, +)
/* { dg-final { scan-assembler-not {vadd.vx} } } */
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
index fb5375d61355..306ad762f9ef 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i16.c
@@ -6,9 +6,9 @@
#define T int16_t
-DEF_VX_BINARY_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +)
#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
index c2c79f5eda57..6ccdf7abdc2a 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i32.c
@@ -6,9 +6,9 @@
#define T int32_t
-DEF_VX_BINARY_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +)
#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
index 541ed21634ab..9484aa8d0027 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i64.c
@@ -6,9 +6,9 @@
#define T int64_t
-DEF_VX_BINARY_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +)
#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
index d507bbbda678..aeb330e84f7f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-i8.c
@@ -6,9 +6,9 @@
#define T int8_t
-DEF_VX_BINARY_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +)
#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
index 52c0749318ef..dafaa298b367 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u16.c
@@ -6,9 +6,9 @@
#define T uint16_t
-DEF_VX_BINARY_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +)
#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
index 70dc34765f9b..6b285c87f70e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u32.c
@@ -6,9 +6,9 @@
#define T uint32_t
-DEF_VX_BINARY_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +)
#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
index 6ce0060a6206..eeee4e10d879 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u64.c
@@ -6,9 +6,9 @@
#define T uint64_t
-DEF_VX_BINARY_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +)
#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
#include "vx_binary_run.h"
diff --git
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
index a0e80b7fce0d..22d7a0e42e8e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vadd-run-1-u8.c
@@ -6,9 +6,9 @@
#define T uint8_t
-DEF_VX_BINARY_WRAP(T, +)
+DEF_VX_BINARY_CASE_0_WRAP(T, +)
#define TEST_DATA TEST_BINARY_DATA_WRAP(T, vadd)
-#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_WRAP(out, in, x, n)
+#define TEST_RUN(out, in, x, n) RUN_VX_BINARY_CASE_0_WRAP(out, in, x, n)
#include "vx_binary_run.h"
