https://gcc.gnu.org/g:24d496c010705440f083921868e9a346671e1718
commit 24d496c010705440f083921868e9a346671e1718
Author: Alexandre Oliva <ol...@adacore.com>
Date: Thu May 8 02:19:13 2025 -0300
[testsuite] [ppc] adjust vsx-builtin-7.c xxpermdi count for lp64 as well
xxpermdi (and rldic) instruction counts are slightly lower than
expected on lp64 as well. Adjust.
for gcc/testsuite/ChangeLog
* gcc.target/powerpc/vsx-builtin-7.c: Adjust expected counts.
Diff:
---
gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
index 20e4483c1aa7..832a365dd394 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
@@ -192,11 +192,11 @@ vector unsigned __int128 splat_uint128 (unsigned __int128
x) { return vec_splats
*/
/* { dg-final { scan-assembler-times {\mrldic\M} 0 { target { be && ilp32 } }
} } */
-/* { dg-final { scan-assembler-times {\mrldic\M} 65 { target { be && lp64 } }
} } */
-/* { dg-final { scan-assembler-times {\mrldic\M} 65 { target le } } } */
+/* { dg-final { scan-assembler-times {\mrldic\M} 64 { target { be && lp64 } }
} } */
+/* { dg-final { scan-assembler-times {\mrldic\M} 64 { target le } } } */
/* { dg-final { scan-assembler-times "xxpermdi" 32 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times "xxpermdi" 33 { target { be && lp64 } } }
} */
-/* { dg-final { scan-assembler-times "xxpermdi" 35 { target { le && lp64 } } }
} */
+/* { dg-final { scan-assembler-times "xxpermdi" 32 { target { be && lp64 } } }
} */
+/* { dg-final { scan-assembler-times "xxpermdi" 34 { target { le && lp64 } } }
} */
/* { dg-final { scan-assembler-times "vspltisb" 2 } } */
/* { dg-final { scan-assembler-times "vspltish" 2 } } */
/* { dg-final { scan-assembler-times "vspltisw" 2 { target be } } } */
