https://gcc.gnu.org/g:750f45c7814968f41142c83ce30719c89eadf9f2
commit 750f45c7814968f41142c83ce30719c89eadf9f2
Author: Alexandre Oliva <ol...@adacore.com>
Date: Thu Apr 10 17:04:58 2025 -0300
[testsuite] [ppc] disable -mpowerpc64 for various ilp32 asm-out checks
Multiple tests on ilp32 get TARGET_POWERPC64 enabled by -mdejagnu-cpu
options, but the results they expect are only attained without
enabling it, so disable it explicitly.
for gcc/testsuite/ChangeLog
* gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-2.c:
Compile with -mno-powerpc64 on ilp32.
* gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-2.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-5.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/builtins-1.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/loop_align.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/ppc-target-4.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/pr79251.p7.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/pr79251.p8.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/pr79251.p9.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/pr96933-2.c: Likewise.
* gcc/testsuite/gcc.target/powerpc/vsu/vec-xl-len-13.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/vsu/vec-xst-len-13.c:
Likewise.
* gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c: Likewise.
Diff:
---
gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-2.c | 2 +-
gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-2.c | 2 +-
gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-5.c | 2 +-
gcc/testsuite/gcc.target/powerpc/builtins-1.c | 2 ++
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c | 3 ++-
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c | 1 +
gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c | 1 +
gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c | 1 +
gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c | 1 +
gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c | 1 +
gcc/testsuite/gcc.target/powerpc/loop_align.c | 5 +++++
gcc/testsuite/gcc.target/powerpc/ppc-target-4.c | 3 +++
gcc/testsuite/gcc.target/powerpc/pr79251.p7.c | 1 +
gcc/testsuite/gcc.target/powerpc/pr79251.p8.c | 1 +
gcc/testsuite/gcc.target/powerpc/pr79251.p9.c | 1 +
gcc/testsuite/gcc.target/powerpc/pr96933-2.c | 1 +
gcc/testsuite/gcc.target/powerpc/vsu/vec-xl-len-13.c | 2 +-
gcc/testsuite/gcc.target/powerpc/vsu/vec-xst-len-13.c | 2 +-
gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c | 1 +
34 files changed, 42 insertions(+), 6 deletions(-)
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-2.c
b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-2.c
index 4f2129f136b4..87c5c084a8e4 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-2.c
@@ -1,6 +1,6 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { has_arch_ppc64 } } */
-/* { dg-options "-mdejagnu-cpu=power9 -mvsx" } */
+/* { dg-options "-mdejagnu-cpu=power9 -mvsx -mno-powerpc64" } */
/* { dg-require-effective-target powerpc_vsx } */
/* This test only runs on 32-bit configurations, producing a compiler
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-2.c
b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-2.c
index ba1f1c20e8b2..9a6a794f6dba 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-2.c
@@ -1,6 +1,6 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { has_arch_ppc64 } } */
-/* { dg-options "-mdejagnu-cpu=power9 -mvsx" } */
+/* { dg-options "-mdejagnu-cpu=power9 -mvsx -mno-powerpc64" } */
/* { dg-require-effective-target powerpc_vsx } */
/* This test only runs on 32-bit configurations, where a compiler error
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-5.c
b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-5.c
index e208c6650e40..c3cdc9475840 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-5.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-5.c
@@ -1,6 +1,6 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { has_arch_ppc64 } } */
-/* { dg-options "-mdejagnu-cpu=power9 -mvsx" } */
+/* { dg-options "-mdejagnu-cpu=power9 -mvsx -mno-powerpc64" } */
/* { dg-require-effective-target powerpc_vsx } */
/* This test only runs on 32-bit configurations, where a compiler error
diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1.c
b/gcc/testsuite/gcc.target/powerpc/builtins-1.c
index 8410a5fd4319..72b97e479dc3 100644
--- a/gcc/testsuite/gcc.target/powerpc/builtins-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/builtins-1.c
@@ -1,5 +1,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power8 -mvsx -O2" } */
+/* On ilp32, we get mulld and divdi[u]? with (implied) -mpowerpc64. */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-additional-options "-mbig" { target powerpc64le-*-* } } */
/* { dg-require-effective-target powerpc_vsx } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c
index ce4cdb6d2388..159d99505475 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p8.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power8 -mvsx -O2" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
// six tests total. Targeting P8LE / P8BE.
@@ -23,7 +24,7 @@
/* { dg-final { scan-assembler-times {\mvspltb\M} 3 { target lp64 } } } */
/* { dg-final { scan-assembler-times {\mrlwinm\M} 4 { target lp64 } } } */
-/* multiple codegen variations for -m32. */
+/* multiple codegen variations for -m32 (with -mno-powerpc64). */
/* { dg-final { scan-assembler-times {\mrlwinm\M} 3 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mstxvw4x\M} 6 { target ilp32 } } } */
/* { dg-final { scan-assembler-times {\mlbz\M} 6 { target ilp32 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c
index e1861c365e14..7ac14a31174f 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-char.p9.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power9 -mvsx -O2 " } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
/* { dg-final { scan-assembler-times {\mli\M} 3 { target lp64 } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
index a0ba94976ac4..b414b96dc59d 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p7.c
@@ -4,6 +4,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power7 -O2" } */
/* { dg-additional-options "-mbig-endian" { target powerpc*-*-linux* } } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_altivec } */
// targeting P7 (BE), 2 tests.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c
index 3bb0eb202f49..f726dc704b34 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-double.p8.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power8 -mvsx -O2" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
// targeting P8, BE and LE. 2 tests.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
index ab03cd8adb00..7afd451a9040 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p7.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power7 -O2 " } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
// targeting P7 (BE), 2 tests.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
index ce435d82c164..207a0c63d652 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-float.p8.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power8 -mvsx -O2" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
// targeting P8, BE and LE. 2 tests.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
index 20e3d2534895..4b7ae9c3cf1e 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p7.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power7 -O2 " } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
// Targeting P7 (BE). 6 tests total.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
index 81d95e456bf0..733a1cb4ee8c 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p8.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power8 -mvsx -O2" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
// Targeting P8 (LE) and (BE). 6 tests total.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c
index 810bf94705ca..ba82a22bff60 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-int.p9.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power9 -mvsx -O2 " } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
// Targeting P9 (LE). 6 tests total.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c
index 5cffea1a6de9..e0d09aadd6c3 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p7.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power7 -O2" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
// Targeting P7. six tests total.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c
index b80c1e8d9891..9bca3e0a8d8e 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power8 -mvsx -O2" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
// Targeting P8LE and P8BE, six tests total.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
index d8ed54703c9e..04f7c4ec2586 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p7.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power7 -O2" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
// six tests total. Targeting P7 BE.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
index af741c1a7ab8..822a57816ae7 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-short.p8.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power8 -mvsx -O2" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
// six tests total. Targeting P8, both LE and BE.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c
index a7ad676f2408..95b9cf6e9bdd 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-char-p9.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mdejagnu-cpu=power9 -mvsx" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
/* The below contains vec_insert () calls with both variable and constant
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c
index 01b1db3d577a..f349c7ea553e 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p8.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mdejagnu-cpu=power8 -mvsx" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c
index 112b3c928990..1e8207cb5644 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-float-p9.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mdejagnu-cpu=power9 -mvsx" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c
index 525d73aee993..36ae946f6768 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-int-p9.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mdejagnu-cpu=power9 -mvsx" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c
b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c
index c5691945b7d1..ad972e4f3bd3 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-insert-short-p9.c
@@ -3,6 +3,7 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mdejagnu-cpu=power9 -mvsx" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
#include <altivec.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
b/gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
index 009a5f228d4c..8cc97ed09730 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-2logical.c
@@ -1,6 +1,7 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } } */
/* { dg-options "-mdejagnu-cpu=power10 -O3 -dp" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
#include <altivec.h>
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
index 165bd9a07add..5a76d23e5042 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-ldcmpi.c
@@ -1,6 +1,7 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } } */
/* { dg-options "-mdejagnu-cpu=power10 -O3 -dp" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c
b/gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c
index b2fefe95169a..c4cdfae23748 100644
--- a/gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c
+++ b/gcc/testsuite/gcc.target/powerpc/fusion-p10-logadd.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-mdejagnu-cpu=power10 -O3 -dp" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
#include <altivec.h>
#include <stdint.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/loop_align.c
b/gcc/testsuite/gcc.target/powerpc/loop_align.c
index ef67f77efed6..434acbaa4cd8 100644
--- a/gcc/testsuite/gcc.target/powerpc/loop_align.c
+++ b/gcc/testsuite/gcc.target/powerpc/loop_align.c
@@ -1,6 +1,11 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* powerpc-ibm-aix* } } */
/* { dg-options "-O2 -mdejagnu-cpu=power7 -falign-functions=16
-fno-unroll-loops" } */
+/* Without -mno-powerpc64, we wouldn't use the counter register on ilp32, and
+ get too many instructions in the loop for the expected loop alignment to
+ apply, even if -fno-reorder-blocks were thrown in to avoid duplicating the
+ loop body. */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-final { scan-assembler ".p2align 5" } } */
void f(double *a, double *b, double *c, unsigned long n) {
diff --git a/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
b/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
index feef76db4618..a88041ee0f7b 100644
--- a/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/ppc-target-4.c
@@ -5,6 +5,9 @@
/* { dg-final { scan-assembler-times "vaddfp" 1 } } */
/* { dg-final { scan-assembler-times "xvaddsp" 1 } } */
/* { dg-final { scan-assembler-times "fadds" 1 } } */
+/* Without -mno-powerpc64, we wouldn't use the counter register on ilp32, and
+ reorder-blocks duplicates the loop body with fadds. */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
#ifndef SIZE
#define SIZE 1024
diff --git a/gcc/testsuite/gcc.target/powerpc/pr79251.p7.c
b/gcc/testsuite/gcc.target/powerpc/pr79251.p7.c
index f3c8add78fb6..db259def39a2 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr79251.p7.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr79251.p7.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mdejagnu-cpu=power7 -mvsx" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
#include <stddef.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/pr79251.p8.c
b/gcc/testsuite/gcc.target/powerpc/pr79251.p8.c
index d163cac0ca28..f0af39e48762 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr79251.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr79251.p8.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mdejagnu-cpu=power8 -mvsx" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
#include <stddef.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/pr79251.p9.c
b/gcc/testsuite/gcc.target/powerpc/pr79251.p9.c
index d7fce16ca275..b0f422e0483c 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr79251.p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr79251.p9.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mdejagnu-cpu=power9 -mvsx" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
#include <stddef.h>
diff --git a/gcc/testsuite/gcc.target/powerpc/pr96933-2.c
b/gcc/testsuite/gcc.target/powerpc/pr96933-2.c
index 6f26f3c06542..e78269e5fed8 100644
--- a/gcc/testsuite/gcc.target/powerpc/pr96933-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr96933-2.c
@@ -1,5 +1,6 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mdejagnu-cpu=power8 -mvsx" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
/* Test vector constructions with char/short type values whether use direct
diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-xl-len-13.c
b/gcc/testsuite/gcc.target/powerpc/vsu/vec-xl-len-13.c
index fddf94393463..76c18e45895a 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-xl-len-13.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-xl-len-13.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-options "-mdejagnu-cpu=power9 -mvsx" } */
+/* { dg-options "-mdejagnu-cpu=power9 -mvsx -mno-powerpc64" } */
/* { dg-require-effective-target ilp32 } */
/* { dg-require-effective-target powerpc_vsx } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-xst-len-13.c
b/gcc/testsuite/gcc.target/powerpc/vsu/vec-xst-len-13.c
index 5f0a938c9347..538c5aaf9add 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-xst-len-13.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-xst-len-13.c
@@ -1,5 +1,5 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
-/* { dg-options "-mdejagnu-cpu=power9 -mvsx" } */
+/* { dg-options "-mdejagnu-cpu=power9 -mvsx -mno-powerpc64" } */
/* { dg-require-effective-target ilp32 } */
/* { dg-require-effective-target powerpc_vsx } */
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
index 5095d5030fdd..4de240c6a95d 100644
--- a/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-builtin-7.c
@@ -1,6 +1,7 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } } */
/* { dg-options "-O2 -mdejagnu-cpu=power7 -fno-inline-functions" } */
+/* { dg-additional-options "-mno-powerpc64" { target ilp32 } } */
/* { dg-require-effective-target powerpc_vsx } */
/* Test simple extract/insert/slat operations. Make sure all types are
