https://gcc.gnu.org/g:2488843477b3dcfeef76f8512ff6d9e8f3b58dca
commit r15-9166-g2488843477b3dcfeef76f8512ff6d9e8f3b58dca Author: Hongyu Wang <hongyu.w...@intel.com> Date: Mon Mar 31 16:39:23 2025 +0800 APX: Emit nf variant for rotl splitter with mask [PR 119539] For spiltter after *<rotate_insn><mode>3_mask it now splits the pattern to *<rotate_insn><mode>3_mask with flag reg clobber, and it doesn't generate nf variant of rotate. Directly emit nf pattern when TARGET_APX_NF enabled in these define_insn_and_split. gcc/ChangeLog: PR target/119539 * config/i386/i386.md (*<insn><mode>3_mask): Emit NF variant of rotate when APX_NF enabled, and use force_lowpart_subreg. (*<insn><mode>3_mask_1): Likewise. gcc/testsuite/ChangeLog: PR target/119539 * gcc.target/i386/apx-nf-pr119539.c: New test. Diff: --- gcc/config/i386/i386.md | 22 +++++++++++++++++++--- gcc/testsuite/gcc.target/i386/apx-nf-pr119539.c | 6 ++++++ 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index f7f790d2aeb4..d6b2f2959b23 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -18153,8 +18153,15 @@ (match_dup 2))) (clobber (reg:CC FLAGS_REG))])] { - operands[2] = force_reg (GET_MODE (operands[2]), operands[2]); - operands[2] = gen_lowpart (QImode, operands[2]); + operands[2] = force_lowpart_subreg (QImode, operands[2], + GET_MODE (operands[2])); + if (TARGET_APX_NF) + { + emit_move_insn (operands[0], + gen_rtx_<CODE> (<MODE>mode, operands[1], + operands[2])); + DONE; + } }) (define_split @@ -18192,7 +18199,16 @@ [(set (match_dup 0) (any_rotate:SWI (match_dup 1) (match_dup 2))) - (clobber (reg:CC FLAGS_REG))])]) + (clobber (reg:CC FLAGS_REG))])] +{ + if (TARGET_APX_NF) + { + emit_move_insn (operands[0], + gen_rtx_<CODE> (<MODE>mode, operands[1], + operands[2])); + DONE; + } +}) (define_split [(set (match_operand:SWI 0 "register_operand") diff --git a/gcc/testsuite/gcc.target/i386/apx-nf-pr119539.c b/gcc/testsuite/gcc.target/i386/apx-nf-pr119539.c new file mode 100644 index 000000000000..5dfec55ed764 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/apx-nf-pr119539.c @@ -0,0 +1,6 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mapx-features=nf -march=x86-64 -O2" } */ +/* { dg-final { scan-assembler-times "\{nf\} rol" 2 } } */ + +long int f1 (int x) { return ~(1ULL << (x & 0x3f)); } +long int f2 (char x) { return ~(1ULL << (x & 0x3f)); }