https://gcc.gnu.org/g:432f0dd62c3b29efbc0b8a1650c05c370477c0b6

commit r15-9067-g432f0dd62c3b29efbc0b8a1650c05c370477c0b6
Author: Andre Simoes Dias Vieira <andre.simoesdiasvie...@arm.com>
Date:   Mon Mar 31 11:12:21 2025 +0100

    aarch64: Remove +sme -> +sve2 feature flag dependency
    
    As per the AArch64 ISA FEAT_SME does not require FEAT_SVE2. However, we 
don't
    support SME without SVE2 and bail out with a 'sorry' if this configuration 
is
    encountered.  We may choose to support this in the future.
    
    gcc/ChangeLog:
    
            * config/aarch64/aarch64-option-extensions.def (SME): Remove SVE2 as
            prerequisite and add in FCMA and F16FML.
            * config/aarch64/aarch64.cc (aarch64_override_options_internal):
            Diagnose use of SME without SVE2 and implicitly enable SVE2 when
            enabling SME after streaming mode diagnosis.
            * doc/invoke.texi (sme): Document that this can only be used with 
the
            sve2 extension.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/aarch64/no-sve-with-sme-1.c: New.
            * gcc.target/aarch64/no-sve-with-sme-2.c: New.
            * gcc.target/aarch64/no-sve-with-sme-3.c: New.
            * gcc.target/aarch64/no-sve-with-sme-4.c: New.
            * gcc.target/aarch64/pragma_cpp_predefs_4.c: Pass +sve2 to existing
            +sme pragma.
            * gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/binary_single_1.c: Likewise.
            * 
gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c:
            * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c:
            Likewise.
            * 
gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c:
            Likewise.
            * 
gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c:
            Likewise.
            * 
gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c:
            Likewise.
            * 
gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c: Likewise.
            * gcc.target/aarch64/sve/acle/general-c/clamp_1.c: Likewise.
            * gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c:
            Likewise.
            * 
gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/storexn_1.c: Likewise.
            * gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c:
            Likewise.
            * 
gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c: 
Likewise.
            * gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c:
            Likewise.
            * gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c: 
Likewise.
            * gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c: Likewise.
            * gcc.target/aarch64/sve/acle/general-c/write_za_1.c: Likewise.
            * gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c: 
Likewise.

Diff:
---
 gcc/config/aarch64/aarch64-option-extensions.def         |  2 +-
 gcc/config/aarch64/aarch64.cc                            | 11 ++++++++++-
 gcc/doc/invoke.texi                                      |  3 ++-
 gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-1.c     |  8 ++++++++
 gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c     |  9 +++++++++
 gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c     |  8 ++++++++
 gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-4.c     | 11 +++++++++++
 gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c  | 16 ++++++++--------
 .../sve/acle/general-c/binary_int_opt_single_n_2.c       |  2 +-
 .../aarch64/sve/acle/general-c/binary_opt_single_n_2.c   |  2 +-
 .../aarch64/sve/acle/general-c/binary_single_1.c         |  2 +-
 .../acle/general-c/binary_za_slice_int_opt_single_1.c    |  2 +-
 .../aarch64/sve/acle/general-c/binary_za_slice_lane_1.c  |  2 +-
 .../aarch64/sve/acle/general-c/binary_za_slice_lane_2.c  |  2 +-
 .../aarch64/sve/acle/general-c/binary_za_slice_lane_3.c  |  2 +-
 .../aarch64/sve/acle/general-c/binary_za_slice_lane_4.c  |  2 +-
 .../sve/acle/general-c/binary_za_slice_opt_single_1.c    |  2 +-
 .../sve/acle/general-c/binary_za_slice_opt_single_2.c    |  2 +-
 .../sve/acle/general-c/binary_za_slice_opt_single_3.c    |  2 +-
 .../acle/general-c/binary_za_slice_uint_opt_single_1.c   |  2 +-
 .../gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c   |  2 +-
 .../gcc.target/aarch64/sve/acle/general-c/clamp_1.c      |  2 +-
 .../aarch64/sve/acle/general-c/compare_scalar_count_1.c  |  2 +-
 .../aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c |  2 +-
 .../aarch64/sve/acle/general-c/dot_za_slice_lane_1.c     |  2 +-
 .../aarch64/sve/acle/general-c/dot_za_slice_lane_2.c     |  2 +-
 .../sve/acle/general-c/dot_za_slice_uint_lane_1.c        |  2 +-
 .../sve/acle/general-c/shift_right_imm_narrowxn_1.c      |  2 +-
 .../gcc.target/aarch64/sve/acle/general-c/storexn_1.c    |  2 +-
 .../aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c  |  2 +-
 .../general-c/ternary_mfloat8_lane_group_selection_1.c   |  2 +-
 .../sve/acle/general-c/ternary_qq_or_011_lane_1.c        |  2 +-
 .../aarch64/sve/acle/general-c/unary_convertxn_1.c       |  2 +-
 .../sve/acle/general-c/unary_convertxn_narrow_1.c        |  2 +-
 .../sve/acle/general-c/unary_convertxn_narrowt_1.c       |  2 +-
 .../aarch64/sve/acle/general-c/unary_za_slice_1.c        |  2 +-
 .../gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c    |  2 +-
 .../gcc.target/aarch64/sve/acle/general-c/write_za_1.c   |  2 +-
 .../aarch64/sve/acle/general-c/write_za_slice_1.c        |  2 +-
 39 files changed, 88 insertions(+), 42 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-option-extensions.def 
b/gcc/config/aarch64/aarch64-option-extensions.def
index 79b79358c5d4..dbbb021f05ac 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -207,7 +207,7 @@ AARCH64_FMV_FEATURE("sve2-sm4", SVE_SM4, (SVE2_SM4))
 
 AARCH64_OPT_EXTENSION("sve2p1", SVE2p1, (SVE2), (), (), "sve2p1")
 
-AARCH64_OPT_FMV_EXTENSION("sme", SME, (BF16, SVE2), (), (), "sme")
+AARCH64_OPT_FMV_EXTENSION("sme", SME, (BF16, FCMA, F16, F16FML), (), (), "sme")
 
 AARCH64_OPT_EXTENSION("memtag", MEMTAG, (), (), (), "")
 
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index 25963c9b300f..4e801146c60a 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -18765,7 +18765,10 @@ aarch64_override_options_internal (struct gcc_options 
*opts)
              " option %<-march%>, or by using the %<target%>"
              " attribute or pragma", "sme");
       opts->x_target_flags &= ~MASK_GENERAL_REGS_ONLY;
-      auto new_flags = isa_flags | feature_deps::SME ().enable;
+      auto new_flags = (isa_flags
+                       | feature_deps::SME ().enable
+                       /* TODO: Remove once we support SME without SVE2.  */
+                       | feature_deps::SVE2 ().enable);
       aarch64_set_asm_isa_flags (opts, new_flags);
     }
 
@@ -18892,6 +18895,12 @@ aarch64_override_options_internal (struct gcc_options 
*opts)
     SET_OPTION_IF_UNSET (opts, &global_options_set, param_fully_pipelined_fma,
                         1);
 
+  /* TODO: SME codegen without SVE2 is not supported, once this support is 
added
+     remove this 'sorry' and the implicit enablement of SVE2 in the checks for
+     streaming mode above in this function.  */
+  if (TARGET_SME && !TARGET_SVE2)
+    sorry ("no support for %qs without %qs", "sme", "sve2");
+
   aarch64_override_options_after_change_1 (opts);
 }
 
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index d4767dcd6148..0da3f296beb0 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -22095,7 +22095,8 @@ Enable the Pointer Authentication Extension.
 @item cssc
 Enable the Common Short Sequence Compression instructions.
 @item sme
-Enable the Scalable Matrix Extension.
+Enable the Scalable Matrix Extension.  This is only supported when SVE2 is also
+enabled.
 @item sme-i16i64
 Enable the FEAT_SME_I16I64 extension to SME.  This also enables SME
 instructions.
diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-1.c 
b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-1.c
new file mode 100644
index 000000000000..e5bb2d95f65f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-1.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-skip-if "Do not override mcpu or march" { *-*-* } { -mcpu=* -march=* } 
{ "" } } */
+/* { dg-options { "-march=armv8-a+sme" } } */
+/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'" "" 
{ target *-*-* } 0 } */
+int main (void)
+{
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c 
b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c
new file mode 100644
index 000000000000..13f09b37d724
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-2.c
@@ -0,0 +1,9 @@
+/* { dg-do compile } */
+/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'" "" 
{ target *-*-* } 0 } */
+
+#pragma GCC target ("arch=armv8.2-a+ssve-fp8fma")
+
+int main (void)
+{
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c 
b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c
new file mode 100644
index 000000000000..9e3cbeb6aeb5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-3.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'" "" 
{ target *-*-* } 0 } */
+
+int __attribute__ ((target( "arch=armv8.2-a+ssve-fp8fma"))) main (void)
+{
+  return 0;
+}
+
diff --git a/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-4.c 
b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-4.c
new file mode 100644
index 000000000000..04a33a7b01b3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/no-sve-with-sme-4.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-skip-if "Do not override mcpu or march" { *-*-* } { -mcpu=* -march=* } 
{ "" } } */
+/* { dg-options { "-march=armv8-a" } } */
+/* { dg-message "sorry, unimplemented: no support for 'sme' without 'sve2'" "" 
{ target *-*-* } 0 } */
+
+#pragma GCC target "+sme"
+
+int main (void)
+{
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c 
b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
index 97d68b94512e..dcac6d5eb658 100644
--- a/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
+++ b/gcc/testsuite/gcc.target/aarch64/pragma_cpp_predefs_4.c
@@ -46,7 +46,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+sme"
+#pragma GCC target "+sve2+sme"
 #ifndef __ARM_FEATURE_SME
 #error Foo
 #endif
@@ -66,7 +66,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme"
+#pragma GCC target "+nothing+sve2+sme"
 #ifdef __ARM_FEATURE_SME_I16I64
 #error Foo
 #endif
@@ -80,7 +80,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme-i16i64"
+#pragma GCC target "+nothing+sve2+sme-i16i64"
 #ifndef __ARM_FEATURE_SME_I16I64
 #error Foo
 #endif
@@ -91,7 +91,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme-b16b16"
+#pragma GCC target "+nothing+sve2+sme-b16b16"
 #ifndef __ARM_FEATURE_SME_B16B16
 #error Foo
 #endif
@@ -105,7 +105,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme-f16f16"
+#pragma GCC target "+nothing+sve2+sme-f16f16"
 #ifndef __ARM_FEATURE_SME_F16F16
 #error Foo
 #endif
@@ -116,7 +116,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme-f64f64"
+#pragma GCC target "+nothing+sve2+sme-f64f64"
 #ifndef __ARM_FEATURE_SME_F64F64
 #error Foo
 #endif
@@ -160,7 +160,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sve-b16b16+sme2"
+#pragma GCC target "+nothing+sve2+sve-b16b16+sme2"
 #ifndef __ARM_FEATURE_SVE_B16B16
 #error Foo
 #endif
@@ -168,7 +168,7 @@
 #error Foo
 #endif
 
-#pragma GCC target "+nothing+sme2p1"
+#pragma GCC target "+nothing+sve2+sme2p1"
 #ifndef __ARM_FEATURE_SME
 #error Foo
 #endif
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
index 976d5af7f237..7150d37a2aa7 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_int_opt_single_n_2.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 #include <arm_sve.h>
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c
index 5cc8a4c5c50f..2823264edbda 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_opt_single_n_2.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 #include <arm_sve.h>
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c
index aa7633bb322f..52f2c090f57b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_single_1.c
@@ -1,6 +1,6 @@
 /* { dg-do compile } */
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 #include <arm_sve.h>
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
index 01cd88f180b8..0e88c1409f41 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_int_opt_single_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svint8_t s8, svuint8_t u8,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c
index 937d992b0541..2c60d50c6eda 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svuint16_t u16, svint32_t s32, svuint32_t u32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c
index 126a764c998e..dd90ebc309ed 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_2.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svuint16_t u16, svint32_t s32, svuint32_t u32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c
index 17bed0c72dc5..f53cc55be3bf 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_3.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svuint16_t u16, svint32_t s32, svuint32_t u32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c
index d2a67c678dff..83c659d94fa8 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_4.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
index 8307a2813dda..a361f7f5cb6b 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svint32_t s32, svuint32_t u32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
index 181f509eee13..959e2229ea93 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_2.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint16_t s16, svint32_t s32, svuint32_t u32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
index 8c8414ec55cf..9cc42c0174ea 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_3.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2+nosme-i16i64")
+#pragma GCC target ("+sve2+sme2+nosme-i16i64")
 
 void
 f1 (svint32x2_t s32x2, svuint32x2_t u32x2,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
index b00c04320bf0..b289c9c871fe 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binary_za_slice_uint_opt_single_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svuint16_t u16, svint8_t s8, svuint8_t u8,
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c
index 600b7fc7959d..4f8ebf8c2c7a 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/binaryxn_2.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 f1 (svbool_t pg, svcount_t pn, svuint8_t u8, svint16_t s16,
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c
index 07e22d2dd715..958c40a2fc6b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/clamp_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 f1 (svcount_t pn, svfloat16_t f16, svint16_t s16, svfloat32_t f32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c
index 47077f7a4e5b..4a4222c1e820 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/compare_scalar_count_1.c
@@ -3,7 +3,7 @@
 #include <arm_sve.h>
 #include <stdbool.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 enum signed_enum { SA = -1, SB };
 enum unsigned_enum { UA, UB };
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c
index ca2a039b3903..aed92b57ac8d 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_int_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c
index e37d24ab6087..bb408682d6b4 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c
index 7af3c6f9eef9..7d57bd1bdadc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_lane_2.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
index 2efa2eb15ee0..cba11a423802 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/dot_za_slice_uint_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
index ab5602f0aa69..685d0700400d 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/shift_right_imm_narrowxn_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svboolx2_t pgx2,
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c
index 7ad4ca8a580a..ba0096b4b4b3 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/storexn_1.c
@@ -3,7 +3,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 struct s { signed char x; };
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c
index 6bdd3c06dc2b..c01710f45649 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target ("arch=armv8.2-a+ssve-fp8fma")
+#pragma GCC target ("arch=armv8.2-a+sve2+ssve-fp8fma")
 
 void
 f1 (svfloat16_t f16, svmfloat8_t f8, fpm_t fpm, 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
index f6fce2f5c40f..fecaf98101a6 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_mfloat8_lane_group_selection_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target ("arch=armv8.2-a+ssve-fp8fma+ssve-fp8dot4+ssve-fp8dot2")
+#pragma GCC target 
("arch=armv8.2-a+sve2+ssve-fp8fma+ssve-fp8dot4+ssve-fp8dot2")
 
 void
 f1 (svfloat16_t f16, svmfloat8_t f8, fpm_t fpm, 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
index b8968c878e1d..5579e0d11b00 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/ternary_qq_or_011_lane_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 f1 (svbool_t pg, svint8_t s8, svuint8_t u8, svint16_t s16, svuint16_t u16,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c
index 85f8b45032d1..e14ec71f0c33 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_1.c
@@ -1,6 +1,6 @@
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 test (svbool_t pg, float f, svint8_t s8, svfloat32_t f32,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
index d312e857d814..e93cc64328f8 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrow_1.c
@@ -1,6 +1,6 @@
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2+fp8"
+#pragma GCC target "+sve2+sme2+fp8"
 
 void
 test (svfloat16x2_t f16x2, svbfloat16x2_t bf16x2, svfloat32x2_t f32x2,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
index ab97eef3472c..da828f0aaf17 100644
--- 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
+++ 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_convertxn_narrowt_1.c
@@ -1,6 +1,6 @@
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2+fp8"
+#pragma GCC target "+sve2+sme2+fp8"
 
 void
 test (svmfloat8_t f8, svfloat32x2_t f32x2, fpm_t fpm0,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c
index e02fe5405b1f..c3052a0a0f43 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unary_za_slice_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target ("+sme2")
+#pragma GCC target ("+sve2+sme2")
 
 void
 f1 (svbool_t pg, svint32_t s32, svint16x2_t s16x2, svint32x2_t s32x2,
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c
index f478945562c8..e9656bc69afc 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/unaryxn_1.c
@@ -1,6 +1,6 @@
 #include <arm_sve.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 test (svfloat32_t f32, svfloat32x2_t f32x2, svfloat32x3_t f32x3,
diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c
index 3a45b58b0234..95ead96a579b 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 f1 (svint8_t s8, svint8x2_t s8x2, svint8x3_t s8x3, svint8x4_t s8x4,
diff --git 
a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c 
b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c
index dedd4b16ea24..dae88926e985 100644
--- a/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general-c/write_za_slice_1.c
@@ -2,7 +2,7 @@
 
 #include <arm_sme.h>
 
-#pragma GCC target "+sme2"
+#pragma GCC target "+sve2+sme2"
 
 void
 f1 (svint8_t s8, svint8x2_t s8x2, svint8x3_t s8x3, svint8x4_t s8x4,

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