https://gcc.gnu.org/g:3154ce9af0163d8d585455230e4c3eee44fbbd01
commit r15-9058-g3154ce9af0163d8d585455230e4c3eee44fbbd01
Author: Richard Biener <rguent...@suse.de>
Date: Thu Mar 27 13:51:38 2025 +0100
target/119010 - Zen4/Zen5 reservations for movlhps loads
The following fixes up the ssemov2 type introduction, amending
the znver4_sse_mov_fp_load reservation. This fixes
;; 14--> b 0: i1436 xmm6=vec_concat(xmm6,[ax+0x8]) :nothing
PR target/119010
* config/i386/zn4zn5.md (znver4_sse_mov_fp_load,
znver5_sse_mov_fp_load): Also match ssemov2.
Diff:
---
gcc/config/i386/zn4zn5.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/config/i386/zn4zn5.md b/gcc/config/i386/zn4zn5.md
index 1ac1d07c04b8..ecb1e3bbedba 100644
--- a/gcc/config/i386/zn4zn5.md
+++ b/gcc/config/i386/zn4zn5.md
@@ -1036,14 +1036,14 @@
(define_insn_reservation "znver4_sse_mov_fp_load" 6
(and (eq_attr "cpu" "znver4")
- (and (eq_attr "type" "ssemov")
+ (and (eq_attr "type" "ssemov,ssemov2")
(and (eq_attr "mode"
"V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,DF,SF")
(eq_attr "memory" "load"))))
"znver4-direct,znver4-load,znver4-fpu")
(define_insn_reservation "znver5_sse_mov_fp_load" 6
(and (eq_attr "cpu" "znver5")
- (and (eq_attr "type" "ssemov")
+ (and (eq_attr "type" "ssemov,ssemov2")
(and (eq_attr "mode"
"V16SF,V8DF,V8SF,V4DF,V4SF,V2DF,V2SF,V1DF,DF,SF")
(eq_attr "memory" "load"))))
"znver4-direct,znver5-load,znver4-fpu")
