https://gcc.gnu.org/g:2d0fc643a0c837064f92f0b3122988b841b74b5f
commit r15-8515-g2d0fc643a0c837064f92f0b3122988b841b74b5f
Author: Antoni Boucher <boua...@zoho.com>
Date: Fri Oct 11 17:05:22 2024 -0400
gccrs: Reorganize the CPU feature detection
Move the code from i386-rust.cc to i386-rust-and-jit.inc so that it can
be reused by libgccjit.
gcc/ChangeLog:
* config/i386/i386-rust-and-jit.inc: New file.
* config/i386/i386-rust.cc: Move code to i386-rust-and-jit.inc.
Diff:
---
gcc/config/i386/i386-rust-and-jit.inc | 93 +++++++++++++++++++++++++++++++++
gcc/config/i386/i386-rust.cc | 96 ++---------------------------------
2 files changed, 96 insertions(+), 93 deletions(-)
diff --git a/gcc/config/i386/i386-rust-and-jit.inc
b/gcc/config/i386/i386-rust-and-jit.inc
new file mode 100644
index 000000000000..998f44cfa3f5
--- /dev/null
+++ b/gcc/config/i386/i386-rust-and-jit.inc
@@ -0,0 +1,93 @@
+if (TARGET_64BIT)
+ ADD_TARGET_INFO ("target_arch", "x86_64");
+else
+ ADD_TARGET_INFO ("target_arch", "x86");
+
+// features officially "stabilised" in rustc
+if (TARGET_MMX)
+ ADD_TARGET_INFO ("target_feature", "mmx");
+if (TARGET_SSE)
+ ADD_TARGET_INFO ("target_feature", "sse");
+if (TARGET_SSE2)
+ ADD_TARGET_INFO ("target_feature", "sse2");
+if (TARGET_SSE3)
+ ADD_TARGET_INFO ("target_feature", "sse3");
+if (TARGET_SSSE3)
+ ADD_TARGET_INFO ("target_feature", "ssse3");
+if (TARGET_SSE4_1)
+ ADD_TARGET_INFO ("target_feature", "sse4.1");
+if (TARGET_SSE4_2)
+ ADD_TARGET_INFO ("target_feature", "sse4.2");
+if (TARGET_AES)
+ ADD_TARGET_INFO ("target_feature", "aes");
+if (TARGET_SHA)
+ ADD_TARGET_INFO ("target_feature", "sha");
+if (TARGET_AVX)
+ ADD_TARGET_INFO ("target_feature", "avx");
+if (TARGET_AVX2)
+ ADD_TARGET_INFO ("target_feature", "avx2");
+if (TARGET_AVX512F)
+ ADD_TARGET_INFO ("target_feature", "avx512f");
+if (TARGET_AVX512CD)
+ ADD_TARGET_INFO ("target_feature", "avx512cd");
+if (TARGET_AVX512DQ)
+ ADD_TARGET_INFO ("target_feature", "avx512dq");
+if (TARGET_AVX512BW)
+ ADD_TARGET_INFO ("target_feature", "avx512bw");
+if (TARGET_AVX512VL)
+ ADD_TARGET_INFO ("target_feature", "avx512vl");
+if (TARGET_AVX512VBMI)
+ ADD_TARGET_INFO ("target_feature", "avx512vbmi");
+if (TARGET_AVX512IFMA)
+ ADD_TARGET_INFO ("target_feature", "avx512ifma");
+if (TARGET_AVX512VPOPCNTDQ)
+ ADD_TARGET_INFO ("target_feature", "avx512vpopcntdq");
+if (TARGET_FMA)
+ ADD_TARGET_INFO ("target_feature", "fma");
+if (TARGET_RTM)
+ ADD_TARGET_INFO ("target_feature", "rtm");
+if (TARGET_SSE4A)
+ ADD_TARGET_INFO ("target_feature", "sse4a");
+if (TARGET_BMI)
+ {
+ ADD_TARGET_INFO ("target_feature", "bmi1");
+ ADD_TARGET_INFO ("target_feature", "bmi");
+ }
+if (TARGET_BMI2)
+ ADD_TARGET_INFO ("target_feature", "bmi2");
+if (TARGET_LZCNT)
+ ADD_TARGET_INFO ("target_feature", "lzcnt");
+if (TARGET_TBM)
+ ADD_TARGET_INFO ("target_feature", "tbm");
+if (TARGET_POPCNT)
+ ADD_TARGET_INFO ("target_feature", "popcnt");
+if (TARGET_RDRND)
+ {
+ ADD_TARGET_INFO ("target_feature", "rdrand");
+ ADD_TARGET_INFO ("target_feature", "rdrnd");
+ }
+if (TARGET_F16C)
+ ADD_TARGET_INFO ("target_feature", "f16c");
+if (TARGET_RDSEED)
+ ADD_TARGET_INFO ("target_feature", "rdseed");
+if (TARGET_ADX)
+ ADD_TARGET_INFO ("target_feature", "adx");
+if (TARGET_FXSR)
+ ADD_TARGET_INFO ("target_feature", "fxsr");
+if (TARGET_XSAVE)
+ ADD_TARGET_INFO ("target_feature", "xsave");
+if (TARGET_XSAVEOPT)
+ ADD_TARGET_INFO ("target_feature", "xsaveopt");
+if (TARGET_XSAVEC)
+ ADD_TARGET_INFO ("target_feature", "xsavec");
+if (TARGET_XSAVES)
+ ADD_TARGET_INFO ("target_feature", "xsaves");
+if (TARGET_VPCLMULQDQ)
+ {
+ ADD_TARGET_INFO ("target_feature", "pclmulqdq");
+ ADD_TARGET_INFO ("target_feature", "vpclmulqdq");
+ }
+if (TARGET_CMPXCHG16B)
+ ADD_TARGET_INFO ("target_feature", "cmpxchg16b");
+if (TARGET_MOVBE)
+ ADD_TARGET_INFO ("target_feature", "movbe");
diff --git a/gcc/config/i386/i386-rust.cc b/gcc/config/i386/i386-rust.cc
index b9099d3dfaf0..de00076bff50 100644
--- a/gcc/config/i386/i386-rust.cc
+++ b/gcc/config/i386/i386-rust.cc
@@ -29,97 +29,7 @@ along with GCC; see the file COPYING3. If not see
void
ix86_rust_target_cpu_info (void)
{
- if (TARGET_64BIT)
- rust_add_target_info ("target_arch", "x86_64");
- else
- rust_add_target_info ("target_arch", "x86");
-
- // features officially "stabilised" in rustc
- if (TARGET_MMX)
- rust_add_target_info ("target_feature", "mmx");
- if (TARGET_SSE)
- rust_add_target_info ("target_feature", "sse");
- if (TARGET_SSE2)
- rust_add_target_info ("target_feature", "sse2");
- if (TARGET_SSE3)
- rust_add_target_info ("target_feature", "sse3");
- if (TARGET_SSSE3)
- rust_add_target_info ("target_feature", "ssse3");
- if (TARGET_SSE4_1)
- rust_add_target_info ("target_feature", "sse4.1");
- if (TARGET_SSE4_2)
- rust_add_target_info ("target_feature", "sse4.2");
- if (TARGET_AES)
- rust_add_target_info ("target_feature", "aes");
- if (TARGET_SHA)
- rust_add_target_info ("target_feature", "sha");
- if (TARGET_AVX)
- rust_add_target_info ("target_feature", "avx");
- if (TARGET_AVX2)
- rust_add_target_info ("target_feature", "avx2");
- if (TARGET_AVX512F)
- rust_add_target_info ("target_feature", "avx512f");
- if (TARGET_AVX512CD)
- rust_add_target_info ("target_feature", "avx512cd");
- if (TARGET_AVX512DQ)
- rust_add_target_info ("target_feature", "avx512dq");
- if (TARGET_AVX512BW)
- rust_add_target_info ("target_feature", "avx512bw");
- if (TARGET_AVX512VL)
- rust_add_target_info ("target_feature", "avx512vl");
- if (TARGET_AVX512VBMI)
- rust_add_target_info ("target_feature", "avx512vbmi");
- if (TARGET_AVX512IFMA)
- rust_add_target_info ("target_feature", "avx512ifma");
- if (TARGET_AVX512VPOPCNTDQ)
- rust_add_target_info ("target_feature", "avx512vpopcntdq");
- if (TARGET_FMA)
- rust_add_target_info ("target_feature", "fma");
- if (TARGET_RTM)
- rust_add_target_info ("target_feature", "rtm");
- if (TARGET_SSE4A)
- rust_add_target_info ("target_feature", "sse4a");
- if (TARGET_BMI)
- {
- rust_add_target_info ("target_feature", "bmi1");
- rust_add_target_info ("target_feature", "bmi");
- }
- if (TARGET_BMI2)
- rust_add_target_info ("target_feature", "bmi2");
- if (TARGET_LZCNT)
- rust_add_target_info ("target_feature", "lzcnt");
- if (TARGET_TBM)
- rust_add_target_info ("target_feature", "tbm");
- if (TARGET_POPCNT)
- rust_add_target_info ("target_feature", "popcnt");
- if (TARGET_RDRND)
- {
- rust_add_target_info ("target_feature", "rdrand");
- rust_add_target_info ("target_feature", "rdrnd");
- }
- if (TARGET_F16C)
- rust_add_target_info ("target_feature", "f16c");
- if (TARGET_RDSEED)
- rust_add_target_info ("target_feature", "rdseed");
- if (TARGET_ADX)
- rust_add_target_info ("target_feature", "adx");
- if (TARGET_FXSR)
- rust_add_target_info ("target_feature", "fxsr");
- if (TARGET_XSAVE)
- rust_add_target_info ("target_feature", "xsave");
- if (TARGET_XSAVEOPT)
- rust_add_target_info ("target_feature", "xsaveopt");
- if (TARGET_XSAVEC)
- rust_add_target_info ("target_feature", "xsavec");
- if (TARGET_XSAVES)
- rust_add_target_info ("target_feature", "xsaves");
- if (TARGET_VPCLMULQDQ)
- {
- rust_add_target_info ("target_feature", "pclmulqdq");
- rust_add_target_info ("target_feature", "vpclmulqdq");
- }
- if (TARGET_CMPXCHG16B)
- rust_add_target_info ("target_feature", "cmpxchg16b");
- if (TARGET_MOVBE)
- rust_add_target_info ("target_feature", "movbe");
+#define ADD_TARGET_INFO rust_add_target_info
+#include "i386-rust-and-jit.inc"
+#undef ADD_TARGET_INFO
}
