[gcc r15-8888] testsuite: aarch64: arm: Remove redundant dg-do run in advsimd-intrinsics tests

[Christophe Lyon via Gcc-cvs]

https://gcc.gnu.org/g:3fcdf55469f8787c04e4f0b5e93139247d8fe7ee

commit r15-8888-g3fcdf55469f8787c04e4f0b5e93139247d8fe7ee
Author: Christophe Lyon <christophe.l...@linaro.org>
Date:   Fri Mar 14 13:12:08 2025 +0000

    testsuite: aarch64: arm: Remove redundant dg-do run in advsimd-intrinsics 
tests
    
    Tests under advsimd-intrinsics are controlled by
    advsimd-intrinsics.exp which computes the adequate dg-do-what
    depending on the actual target, it should not be redefined in the
    tests, except when the action can never be 'run'.
    
    This currently makes no difference, but it would when we remove
    dg-skip-if for arm targets from tests that could at least be compiled
    (e.g. vst1x2.c)
    
            gcc/testsuite/
    
            * gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c: Remove
            dg-do directive.
            * gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vld1x2.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vld1x3.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vld1x4.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c: 
Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vst1x2.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vst1x3.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vst1x4.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: Likewise.
            * gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: Likewise.

Diff:
---
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c        | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c        | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c     | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c            | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c            | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c            | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c     | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c     | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c     | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c     | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c     | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c  | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c    | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c   | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c     | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c    | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c     | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c     | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c     | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c    | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c    | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c      | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c            | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c            | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c            | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c       | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c         | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c         | 1 -
 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c         | 1 -
 120 files changed, 120 deletions(-)

diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c
index 3a5efa58088b..7478323f7bec 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c
index 16a986ac5908..ebae42278ae8 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vabsh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c
index 4b0e24284f87..dd62e32b907e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vaddh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c
index 0bebec76248c..70279d21387e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c
index 68ce599719e1..2e8205d547a2 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c
index 1b5a09b4629b..eae7189fb9dd 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c
index 766c783f3b04..f23900e96cac 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c
index 8f5c14b4349e..a7356028277e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c
index ccfecf429996..2792c2c14a6d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c
index 161c7a04e1e4..6b4e028bb693 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c
index 2d3cd8ad56ac..cf446315bb21 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c
index 0d353859b4d9..c95a455798ce 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c
index ca23e3f00139..a80178526406 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c
index f51cac356356..9d17b05b9ac1 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c
index 57901c8bd45f..94e2f5d92485 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c
index 32188732deb0..a1c8c504151e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c
index af6a5b64414d..96200019ebc3 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c
index 2084c3038c39..05cda23c6535 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c
index ebfd62a10685..f567e9b58a12 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c
index a27871bbf2a6..842005bf54ad 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c
index 0642ae037ece..1e23056c50ab 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c
index 5ae28fc11dbd..719769a68fa6 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c
index 2d197b4eab3b..77b226b24d39 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c
index 540b637fbfed..32a7f92800b6 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c
index 2173a0ef4ee3..a24f787c4ebd 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s32_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c
index 5f17dbe9cc35..7a7617d8b08f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c
index 426700cef0b0..7c6ad5a4dd34 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c
index 15832023a056..afe6c0349798 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u32_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c
index 3413de021a03..6c988e6cb55b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c
index 25265d19e7a5..87dcfe57a13e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c
index 9ce95581f694..944b325c3920 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s32_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c
index f0adb097e8ca..2756d0e56270 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c
index 74c4e60d50df..874726d48961 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c
index d308c35bea1b..4ee9dc749c09 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u32_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c
index b393767b356d..ef61a2442ddc 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c
index 247f7c9fe682..8e725c76af2d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c
index 6e2ee500cf8c..f09cab04f20c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c
index 27502c220f6b..668be0f27ae7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c
index e5f57f12c6b3..d3aeb696789e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c
index 188f60cafe13..c66ee58f1253 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c
index cfc33c24e643..dd2dfbd7ad40 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c
index 99656544533f..21055dbb8959 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c
index 6bff9546531a..c6d84819860f 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c
index c7b3d17469be..a8bb32254a44 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c
index e3c5d3a0b730..a2300b4981bc 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c
index d5807d743174..1de55518e6cd 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c
index a904e5e472a6..a5b346f2b389 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c
index ef0132a1ccdb..d20e2dca6a16 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c
index f4f7b374d3e6..474cd20b1dd5 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c
index 7b5b16ff5698..b5647490bfff 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c
index db56171da3e4..1e5c289cc455 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c
index 6cda3b636015..3ee219484268 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c
index cae69a347047..175bcf22aa38 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c
index dec8d857036d..ef5acbbd5e6b 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c
index 94c333ee44c5..2f9855cb11b6 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c
index 0048b5bf153e..f159ac262226 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c
index 0a95cea63521..39d92ec21059 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c
index 97d5fbabb3f2..fe605b525f90 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c
index 3b1b273b6459..597a2e0cbd9e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c
index 5ff0d226077b..d58cad8677d0 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c
index 105d2367175c..a2a246d4f458 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c
index 290c5b13a7ca..a4905b1dac23 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c
index e367dad8e5c6..8e443bdefdb3 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c
index d66adcd44a7c..63b793bc1592 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u32_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c
index 02290991a9aa..b1238def1a96 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c
index c0103fb0bcf1..99c3e95c7589 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c
index 6a991098efd9..c5b458b68bd1 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vdivh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c
index c9d553ac5f7c..789d9e2beff6 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c
index 1ac6b67ba8b6..aae9a94c7d07 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmah_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c
index 00c95d3e28da..363d25fcea03 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c
index f01aefb51ade..72416dc00987 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c
index ea751da72b23..57ff6849d7b4 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c
index 77021bec6157..d2486f1f4212 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vfmsh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
index 6e56ff171f89..0892ce791187 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x2.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c
index 42aeadf1c7d4..9465e4aabb67 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x3.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c
index 694fda86e724..a1461fd1af5d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1x4.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c
index 182463ed74e4..763eb4797d77 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c
index 4db4b84885e6..5242d553646a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c
index ce9872f260bc..3b12e621c0d4 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c
index 39c48977c86a..bcb56fe5ac24 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c
index d8efbcac6939..9ee302fef58e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c
index f6b02161fa4b..e70bc6cf918a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c
index b7c51011da52..1910d9f425c9 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c
index c454a530192f..3ab54326078e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c
index 1719d5626711..d470308f8b4a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c
index 09684d24d3c1..85fe6873d374 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c
index 4cd5c37c632d..fe7cc84ddd47 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c
index 51bbead3f2a9..1b5b8695038a 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c
index f90a36d1cd3c..2a4f24fb7c63 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c
index 140647b453d6..d1fd3164a5c1 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c
index 66c744ce1c02..1c85773eeef7 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c
index 90a5be8de4fc..d2df24cac1c2 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c
index 421d8277fd35..37ce039af6dd 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vnegh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c
index c8df67757e04..df3b83d5d174 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c
index 6ebe0743cc48..07d873d5fb36 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrn_high_n.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c
index 49d319d0181e..e8f464d12b86 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrshrun_high_n.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c
index 8d06f113dc8c..5a3ea62878fb 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrn_high_n.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c
index e8235fe96932..80c66fd6fe22 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqshrun_high_n.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c
index 3740d6afa681..f0d0da78f726 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c
index 3e6b24e43788..9dd8981ee4dc 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c
index fc02b6b77600..9593b18a527c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c
index bcf47f658d3e..6b40e29cc735 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndah_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c
index 3c4649eb19fb..691fcd7ec85e 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c
index 7a4620bc8943..1c596b0ea8d8 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c
index 4a7b721a511b..6cbcf7c74ead 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndih_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c
index 9af357dbd4ae..7accb45af875 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndmh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c
index eb4b27dda94e..bc841b552257 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndnh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c
index 3fa9749cbf30..856a661e5503 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndph_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c
index eb4b27dda94e..bc841b552257 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrndxh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c
index 7c0e6195be69..02d8bb7bc223 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git 
a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c
index a9753a4df063..b32c44cdef2c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c
index 82249a798289..77f9460d61d1 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_neon_hw } */
 /* { dg-add-options arm_v8_2a_fp16_neon } */
 /* { dg-skip-if "" { arm*-*-* } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c
index 7d0382777826..89b910cebf92 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsqrth_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c
index 69be40a444a9..3cf5eb3bd7e8 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x2.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c
index 4d42bccec3ca..c05f8e73e644 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x3.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c
index ddc7fa594653..a9867c312cf1 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vst1x4.c
@@ -1,5 +1,4 @@
 /* We haven't implemented these intrinsics for arm yet.  */
-/* { dg-do run } */
 /* { dg-skip-if "unimplemented" { arm*-*-* } } */
 /* { dg-options "-O3" } */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c
index a7aba11aaff3..d24a599ab260 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubh_f16_1.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-require-effective-target arm_v8_2a_fp16_scalar_hw } */
 /* { dg-add-options arm_v8_2a_fp16_scalar }  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c
index 6debfe5bf566..c9485c360d56 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c
index fe35e158b56e..12ae8b0d5a1c 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>
diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c 
b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c
index 59141927ce85..65bc1408531d 100644
--- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c
+++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vzip_half.c
@@ -1,4 +1,3 @@
-/* { dg-do run } */
 /* { dg-skip-if "" { arm*-*-* } } */
 
 #include <arm_neon.h>